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x86: baytrail: Update UPD setting for FSP Gold4 release

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BayTrail FSP Gold4 release adds one UPD parameter to control IGD
enable/disable.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2015-07-30 03:49:15 -07:00 committed by Simon Glass
parent 456ee909d6
commit 3e79a4ab26
1 changed files with 2 additions and 1 deletions
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3
arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
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@ -75,7 +75,8 @@ struct __packed upd_region {
uint8_t emmc45_ddr50_enabled; /* Offset 0x0051 */
uint8_t emmc45_hs200_enabled; /* Offset 0x0052 */
uint8_t emmc45_retune_timer_value; /* Offset 0x0053 */
uint8_t unused_upd_space1[156]; /* Offset 0x0054 */
uint8_t enable_igd; /* Offset 0x0054 */
uint8_t unused_upd_space1[155]; /* Offset 0x0055 */
struct memory_down_data memory_params; /* Offset 0x00f0 */
uint16_t terminator; /* Offset 0x0100 */
};