net: smc911x: Pass around driver private data
Introduce a private data structure for this driver with embedded struct eth_device and pass it around. This prepares the driver to work with both DM and non-DM systems. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
parent
ba267c781d
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3dbab92603
@ -20,6 +20,13 @@ struct chip_id {
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char *name;
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};
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struct smc911x_priv {
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struct eth_device dev;
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phys_addr_t iobase;
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const struct chip_id *chipid;
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unsigned char enetaddr[6];
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};
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static const struct chip_id chip_ids[] = {
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{ CHIP_89218, "LAN89218" },
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{ CHIP_9115, "LAN9115" },
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@ -45,57 +52,57 @@ static const struct chip_id chip_ids[] = {
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#endif
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#if defined (CONFIG_SMC911X_32_BIT)
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static u32 smc911x_reg_read(struct eth_device *dev, u32 offset)
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static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
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{
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return readl(dev->iobase + offset);
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return readl(priv->iobase + offset);
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}
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static void smc911x_reg_write(struct eth_device *dev, u32 offset, u32 val)
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static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
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{
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writel(val, dev->iobase + offset);
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writel(val, priv->iobase + offset);
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}
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#elif defined (CONFIG_SMC911X_16_BIT)
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static u32 smc911x_reg_read(struct eth_device *dev, u32 offset)
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static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
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{
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return (readw(dev->iobase + offset) & 0xffff) |
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(readw(dev->iobase + offset + 2) << 16);
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return (readw(priv->iobase + offset) & 0xffff) |
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(readw(priv->iobase + offset + 2) << 16);
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}
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static void smc911x_reg_write(struct eth_device *dev, u32 offset, u32 val)
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static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
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{
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writew(val & 0xffff, dev->iobase + offset);
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writew(val >> 16, dev->iobase + offset + 2);
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writew(val & 0xffff, priv->iobase + offset);
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writew(val >> 16, priv->iobase + offset + 2);
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}
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#else
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#error "SMC911X: undefined bus width"
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#endif /* CONFIG_SMC911X_16_BIT */
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static u32 smc911x_get_mac_csr(struct eth_device *dev, u8 reg)
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static u32 smc911x_get_mac_csr(struct smc911x_priv *priv, u8 reg)
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{
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while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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;
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smc911x_reg_write(dev, MAC_CSR_CMD,
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smc911x_reg_write(priv, MAC_CSR_CMD,
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MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
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while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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;
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return smc911x_reg_read(dev, MAC_CSR_DATA);
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return smc911x_reg_read(priv, MAC_CSR_DATA);
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}
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static void smc911x_set_mac_csr(struct eth_device *dev, u8 reg, u32 data)
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static void smc911x_set_mac_csr(struct smc911x_priv *priv, u8 reg, u32 data)
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{
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while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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;
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smc911x_reg_write(dev, MAC_CSR_DATA, data);
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smc911x_reg_write(dev, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
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while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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smc911x_reg_write(priv, MAC_CSR_DATA, data);
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smc911x_reg_write(priv, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
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while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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;
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}
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static int smc911x_detect_chip(struct eth_device *dev)
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static int smc911x_detect_chip(struct smc911x_priv *priv)
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{
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unsigned long val, i;
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val = smc911x_reg_read(dev, BYTE_TEST);
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val = smc911x_reg_read(priv, BYTE_TEST);
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if (val == 0xffffffff) {
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/* Special case -- no chip present */
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return -1;
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@ -104,7 +111,7 @@ static int smc911x_detect_chip(struct eth_device *dev)
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return -1;
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}
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val = smc911x_reg_read(dev, ID_REV) >> 16;
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val = smc911x_reg_read(priv, ID_REV) >> 16;
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for (i = 0; chip_ids[i].id != 0; i++) {
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if (chip_ids[i].id == val) break;
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}
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@ -113,12 +120,12 @@ static int smc911x_detect_chip(struct eth_device *dev)
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return -1;
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}
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dev->priv = (void *)&chip_ids[i];
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priv->chipid = &chip_ids[i];
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return 0;
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}
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static void smc911x_reset(struct eth_device *dev)
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static void smc911x_reset(struct smc911x_priv *priv)
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{
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int timeout;
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@ -126,14 +133,14 @@ static void smc911x_reset(struct eth_device *dev)
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* Take out of PM setting first
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* Device is already wake up if PMT_CTRL_READY bit is set
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*/
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if ((smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY) == 0) {
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if ((smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY) == 0) {
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/* Write to the bytetest will take out of powerdown */
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smc911x_reg_write(dev, BYTE_TEST, 0x0);
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smc911x_reg_write(priv, BYTE_TEST, 0x0);
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timeout = 10;
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while (timeout-- &&
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!(smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY))
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!(smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY))
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udelay(10);
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if (timeout < 0) {
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printf(DRIVERNAME
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@ -143,12 +150,12 @@ static void smc911x_reset(struct eth_device *dev)
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}
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/* Disable interrupts */
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smc911x_reg_write(dev, INT_EN, 0);
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smc911x_reg_write(priv, INT_EN, 0);
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smc911x_reg_write(dev, HW_CFG, HW_CFG_SRST);
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smc911x_reg_write(priv, HW_CFG, HW_CFG_SRST);
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timeout = 1000;
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while (timeout-- && smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY)
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while (timeout-- && smc911x_reg_read(priv, E2P_CMD) & E2P_CMD_EPC_BUSY)
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udelay(10);
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if (timeout < 0) {
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@ -157,83 +164,83 @@ static void smc911x_reset(struct eth_device *dev)
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}
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/* Reset the FIFO level and flow control settings */
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smc911x_set_mac_csr(dev, FLOW, FLOW_FCPT | FLOW_FCEN);
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smc911x_reg_write(dev, AFC_CFG, 0x0050287F);
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smc911x_set_mac_csr(priv, FLOW, FLOW_FCPT | FLOW_FCEN);
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smc911x_reg_write(priv, AFC_CFG, 0x0050287F);
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/* Set to LED outputs */
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smc911x_reg_write(dev, GPIO_CFG, 0x70070000);
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smc911x_reg_write(priv, GPIO_CFG, 0x70070000);
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}
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static void smc911x_handle_mac_address(struct eth_device *dev)
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static void smc911x_handle_mac_address(struct smc911x_priv *priv)
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{
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unsigned long addrh, addrl;
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uchar *m = dev->enetaddr;
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unsigned char *m = priv->enetaddr;
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addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
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addrh = m[4] | (m[5] << 8);
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smc911x_set_mac_csr(dev, ADDRL, addrl);
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smc911x_set_mac_csr(dev, ADDRH, addrh);
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smc911x_set_mac_csr(priv, ADDRL, addrl);
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smc911x_set_mac_csr(priv, ADDRH, addrh);
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printf(DRIVERNAME ": MAC %pM\n", m);
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}
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static int smc911x_eth_phy_read(struct eth_device *dev,
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static int smc911x_eth_phy_read(struct smc911x_priv *priv,
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u8 phy, u8 reg, u16 *val)
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{
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while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
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while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
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;
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smc911x_set_mac_csr(dev, MII_ACC, phy << 11 | reg << 6 |
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smc911x_set_mac_csr(priv, MII_ACC, phy << 11 | reg << 6 |
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MII_ACC_MII_BUSY);
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while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
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while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
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;
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*val = smc911x_get_mac_csr(dev, MII_DATA);
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*val = smc911x_get_mac_csr(priv, MII_DATA);
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return 0;
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}
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static int smc911x_eth_phy_write(struct eth_device *dev,
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static int smc911x_eth_phy_write(struct smc911x_priv *priv,
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u8 phy, u8 reg, u16 val)
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{
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while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
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while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
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;
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smc911x_set_mac_csr(dev, MII_DATA, val);
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smc911x_set_mac_csr(dev, MII_ACC,
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smc911x_set_mac_csr(priv, MII_DATA, val);
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smc911x_set_mac_csr(priv, MII_ACC,
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phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE);
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while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
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while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
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;
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return 0;
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}
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static int smc911x_phy_reset(struct eth_device *dev)
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static int smc911x_phy_reset(struct smc911x_priv *priv)
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{
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u32 reg;
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reg = smc911x_reg_read(dev, PMT_CTRL);
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reg = smc911x_reg_read(priv, PMT_CTRL);
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reg &= ~0xfffff030;
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reg |= PMT_CTRL_PHY_RST;
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smc911x_reg_write(dev, PMT_CTRL, reg);
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smc911x_reg_write(priv, PMT_CTRL, reg);
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mdelay(100);
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return 0;
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}
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static void smc911x_phy_configure(struct eth_device *dev)
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static void smc911x_phy_configure(struct smc911x_priv *priv)
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{
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int timeout;
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u16 status;
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smc911x_phy_reset(dev);
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smc911x_phy_reset(priv);
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smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_RESET);
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smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_RESET);
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mdelay(1);
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smc911x_eth_phy_write(dev, 1, MII_ADVERTISE, 0x01e1);
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smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_ANENABLE |
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smc911x_eth_phy_write(priv, 1, MII_ADVERTISE, 0x01e1);
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smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_ANENABLE |
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BMCR_ANRESTART);
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timeout = 5000;
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@ -242,7 +249,7 @@ static void smc911x_phy_configure(struct eth_device *dev)
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if ((timeout--) == 0)
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goto err_out;
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if (smc911x_eth_phy_read(dev, 1, MII_BMSR, &status) != 0)
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if (smc911x_eth_phy_read(priv, 1, MII_BMSR, &status) != 0)
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goto err_out;
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} while (!(status & BMSR_LSTATUS));
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@ -254,64 +261,66 @@ err_out:
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printf(DRIVERNAME ": autonegotiation timed out\n");
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}
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static void smc911x_enable(struct eth_device *dev)
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static void smc911x_enable(struct smc911x_priv *priv)
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{
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/* Enable TX */
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smc911x_reg_write(dev, HW_CFG, 8 << 16 | HW_CFG_SF);
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smc911x_reg_write(priv, HW_CFG, 8 << 16 | HW_CFG_SF);
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smc911x_reg_write(dev, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
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smc911x_reg_write(priv, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
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smc911x_reg_write(dev, TX_CFG, TX_CFG_TX_ON);
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smc911x_reg_write(priv, TX_CFG, TX_CFG_TX_ON);
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/* no padding to start of packets */
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smc911x_reg_write(dev, RX_CFG, 0);
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smc911x_reg_write(priv, RX_CFG, 0);
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smc911x_set_mac_csr(dev, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
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smc911x_set_mac_csr(priv, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
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MAC_CR_HBDIS);
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}
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static int smc911x_init(struct eth_device *dev, bd_t * bd)
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{
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struct chip_id *id = dev->priv;
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struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
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const struct chip_id *id = priv->chipid;
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printf(DRIVERNAME ": detected %s controller\n", id->name);
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smc911x_reset(dev);
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smc911x_reset(priv);
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/* Configure the PHY, initialize the link state */
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smc911x_phy_configure(dev);
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smc911x_phy_configure(priv);
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smc911x_handle_mac_address(dev);
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smc911x_handle_mac_address(priv);
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/* Turn on Tx + Rx */
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smc911x_enable(dev);
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smc911x_enable(priv);
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return 0;
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}
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static int smc911x_send(struct eth_device *dev, void *packet, int length)
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{
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struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
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u32 *data = (u32*)packet;
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u32 tmplen;
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u32 status;
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smc911x_reg_write(dev, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
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smc911x_reg_write(priv, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
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TX_CMD_A_INT_LAST_SEG | length);
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smc911x_reg_write(dev, TX_DATA_FIFO, length);
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smc911x_reg_write(priv, TX_DATA_FIFO, length);
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tmplen = (length + 3) / 4;
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while (tmplen--)
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smc911x_reg_write(dev, TX_DATA_FIFO, *data++);
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smc911x_reg_write(priv, TX_DATA_FIFO, *data++);
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/* wait for transmission */
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while (!((smc911x_reg_read(dev, TX_FIFO_INF) &
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while (!((smc911x_reg_read(priv, TX_FIFO_INF) &
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TX_FIFO_INF_TSUSED) >> 16));
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/* get status. Ignore 'no carrier' error, it has no meaning for
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* full duplex operation
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*/
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status = smc911x_reg_read(dev, TX_STATUS_FIFO) &
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status = smc911x_reg_read(priv, TX_STATUS_FIFO) &
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(TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL |
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TX_STS_MANY_DEFER | TX_STS_UNDERRUN);
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@ -330,25 +339,28 @@ static int smc911x_send(struct eth_device *dev, void *packet, int length)
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static void smc911x_halt(struct eth_device *dev)
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{
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smc911x_reset(dev);
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smc911x_handle_mac_address(dev);
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struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
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smc911x_reset(priv);
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smc911x_handle_mac_address(priv);
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}
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static int smc911x_recv(struct eth_device *dev)
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{
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struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
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u32 *data = (u32 *)net_rx_packets[0];
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u32 pktlen, tmplen;
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u32 status;
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if ((smc911x_reg_read(dev, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED) >> 16) {
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status = smc911x_reg_read(dev, RX_STATUS_FIFO);
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if ((smc911x_reg_read(priv, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED) >> 16) {
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status = smc911x_reg_read(priv, RX_STATUS_FIFO);
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pktlen = (status & RX_STS_PKT_LEN) >> 16;
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|
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smc911x_reg_write(dev, RX_CFG, 0);
|
||||
smc911x_reg_write(priv, RX_CFG, 0);
|
||||
|
||||
tmplen = (pktlen + 3) / 4;
|
||||
while (tmplen--)
|
||||
*data++ = smc911x_reg_read(dev, RX_DATA_FIFO);
|
||||
*data++ = smc911x_reg_read(priv, RX_DATA_FIFO);
|
||||
|
||||
if (status & RX_STS_ES)
|
||||
printf(DRIVERNAME
|
||||
@ -367,31 +379,34 @@ static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,
|
||||
int reg)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
|
||||
u16 val = 0;
|
||||
int ret;
|
||||
|
||||
if (!dev)
|
||||
if (!dev || !priv)
|
||||
return -ENODEV;
|
||||
|
||||
ret = smc911x_eth_phy_read(dev, phy, reg, &val);
|
||||
ret = smc911x_eth_phy_read(priv, phy, reg, &val);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
/* wrapper for smc911x_eth_phy_write */
|
||||
static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,
|
||||
int reg, u16 val)
|
||||
{
|
||||
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
||||
struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
|
||||
|
||||
if (!dev)
|
||||
if (!dev || !priv)
|
||||
return -ENODEV;
|
||||
|
||||
return smc911x_eth_phy_write(dev, phy, reg, val);
|
||||
return smc911x_eth_phy_write(priv, phy, reg, val);
|
||||
}
|
||||
|
||||
static int smc911x_initialize_mii(struct eth_device *dev)
|
||||
static int smc911x_initialize_mii(struct smc911x_priv *priv)
|
||||
{
|
||||
struct mii_dev *mdiodev = mdio_alloc();
|
||||
int ret;
|
||||
@ -399,7 +414,7 @@ static int smc911x_initialize_mii(struct eth_device *dev)
|
||||
if (!mdiodev)
|
||||
return -ENOMEM;
|
||||
|
||||
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
||||
strncpy(mdiodev->name, priv->dev.name, MDIO_NAME_LEN);
|
||||
mdiodev->read = smc911x_miiphy_read;
|
||||
mdiodev->write = smc911x_miiphy_write;
|
||||
|
||||
@ -412,7 +427,7 @@ static int smc911x_initialize_mii(struct eth_device *dev)
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static int smc911x_initialize_mii(struct eth_device *dev)
|
||||
static int smc911x_initialize_mii(struct smc911x_priv *priv)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
@ -421,51 +436,52 @@ static int smc911x_initialize_mii(struct eth_device *dev)
|
||||
int smc911x_initialize(u8 dev_num, int base_addr)
|
||||
{
|
||||
unsigned long addrl, addrh;
|
||||
struct eth_device *dev;
|
||||
struct smc911x_priv *priv;
|
||||
int ret;
|
||||
|
||||
dev = calloc(1, sizeof(*dev));
|
||||
if (!dev)
|
||||
priv = calloc(1, sizeof(*priv));
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
dev->iobase = base_addr;
|
||||
priv->iobase = base_addr;
|
||||
priv->dev.iobase = base_addr;
|
||||
|
||||
/* Try to detect chip. Will fail if not present. */
|
||||
ret = smc911x_detect_chip(dev);
|
||||
ret = smc911x_detect_chip(priv);
|
||||
if (ret) {
|
||||
ret = 0; /* Card not detected is not an error */
|
||||
goto err_detect;
|
||||
}
|
||||
|
||||
addrh = smc911x_get_mac_csr(dev, ADDRH);
|
||||
addrl = smc911x_get_mac_csr(dev, ADDRL);
|
||||
addrh = smc911x_get_mac_csr(priv, ADDRH);
|
||||
addrl = smc911x_get_mac_csr(priv, ADDRL);
|
||||
if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
|
||||
/* address is obtained from optional eeprom */
|
||||
dev->enetaddr[0] = addrl;
|
||||
dev->enetaddr[1] = addrl >> 8;
|
||||
dev->enetaddr[2] = addrl >> 16;
|
||||
dev->enetaddr[3] = addrl >> 24;
|
||||
dev->enetaddr[4] = addrh;
|
||||
dev->enetaddr[5] = addrh >> 8;
|
||||
priv->enetaddr[0] = addrl;
|
||||
priv->enetaddr[1] = addrl >> 8;
|
||||
priv->enetaddr[2] = addrl >> 16;
|
||||
priv->enetaddr[3] = addrl >> 24;
|
||||
priv->enetaddr[4] = addrh;
|
||||
priv->enetaddr[5] = addrh >> 8;
|
||||
}
|
||||
|
||||
dev->init = smc911x_init;
|
||||
dev->halt = smc911x_halt;
|
||||
dev->send = smc911x_send;
|
||||
dev->recv = smc911x_recv;
|
||||
sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);
|
||||
priv->dev.init = smc911x_init;
|
||||
priv->dev.halt = smc911x_halt;
|
||||
priv->dev.send = smc911x_send;
|
||||
priv->dev.recv = smc911x_recv;
|
||||
sprintf(priv->dev.name, "%s-%hu", DRIVERNAME, dev_num);
|
||||
|
||||
eth_register(dev);
|
||||
eth_register(&priv->dev);
|
||||
|
||||
ret = smc911x_initialize_mii(dev);
|
||||
ret = smc911x_initialize_mii(priv);
|
||||
if (ret)
|
||||
goto err_mii;
|
||||
|
||||
return 1;
|
||||
|
||||
err_mii:
|
||||
eth_unregister(dev);
|
||||
eth_unregister(&priv->dev);
|
||||
err_detect:
|
||||
free(dev);
|
||||
free(priv);
|
||||
return ret;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user