ppc4xx: Add AMCC Kilauea/Haleakala NAND booting support
This patch adds NAND booting support for the AMCC 405EX(r) eval boards. Again, only one image supports both targets. Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
parent
5d96d40d3f
commit
3d6cb3b24a
2
MAKEALL
2
MAKEALL
@ -181,6 +181,7 @@ LIST_4xx=" \
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EXBITGEN \
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G2000 \
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haleakala \
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haleakala_nand \
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hcu4 \
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hcu5 \
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HH405 \
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@ -189,6 +190,7 @@ LIST_4xx=" \
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KAREF \
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katmai \
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kilauea \
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kilauea_nand \
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luan \
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lwmon5 \
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makalu \
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9
Makefile
9
Makefile
@ -1173,6 +1173,15 @@ kilauea_config \
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haleakala_config: unconfig
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@$(MKCONFIG) -n $@ -a kilauea ppc ppc4xx kilauea amcc
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kilauea_nand_config \
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haleakala_nand_config: unconfig
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@mkdir -p $(obj)include $(obj)board/amcc/kilauea
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@mkdir -p $(obj)nand_spl/board/amcc/kilauea
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@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
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@$(MKCONFIG) -n $@ -a kilauea ppc ppc4xx kilauea amcc
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@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/kilauea/config.tmp
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@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
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luan_config: unconfig
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@$(MKCONFIG) $(@:_config=) ppc ppc4xx luan amcc
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@ -1,5 +1,5 @@
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#
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# (C) Copyright 2000
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# (C) Copyright 2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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@ -21,4 +21,12 @@
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# MA 02111-1307 USA
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#
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sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
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ifndef TEXT_BASE
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TEXT_BASE = 0xFFFA0000
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endif
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ifeq ($(debug),1)
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PLATFORM_CPPFLAGS += -DDEBUG
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endif
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@ -38,6 +38,7 @@
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.globl ext_bus_cntlr_init
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ext_bus_cntlr_init:
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#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
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/*
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* DDR2 setup
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@ -148,5 +149,6 @@ pll_wait:
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/* Enable memory controller */
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mtsdram_as(SDRAM_MCOPT2, 0x28000000);
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#endif /* #ifndef CONFIG_NAND_U_BOOT */
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blr
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137
board/amcc/kilauea/u-boot-nand.lds
Normal file
137
board/amcc/kilauea/u-boot-nand.lds
Normal file
@ -0,0 +1,137 @@
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/*
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* (C) Copyright 2007
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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OUTPUT_ARCH(powerpc)
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SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
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SECTIONS
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{
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/* Read-only sections, merged into text segment: */
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. = + SIZEOF_HEADERS;
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.interp : { *(.interp) }
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.hash : { *(.hash) }
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.dynsym : { *(.dynsym) }
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.dynstr : { *(.dynstr) }
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.rel.text : { *(.rel.text) }
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.rela.text : { *(.rela.text) }
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.rel.data : { *(.rel.data) }
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.rela.data : { *(.rela.data) }
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.rel.rodata : { *(.rel.rodata) }
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.rela.rodata : { *(.rela.rodata) }
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.rel.got : { *(.rel.got) }
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.rela.got : { *(.rela.got) }
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.rel.ctors : { *(.rel.ctors) }
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.rela.ctors : { *(.rela.ctors) }
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.rel.dtors : { *(.rel.dtors) }
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.rela.dtors : { *(.rela.dtors) }
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.rel.bss : { *(.rel.bss) }
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.rela.bss : { *(.rela.bss) }
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.rel.plt : { *(.rel.plt) }
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.rela.plt : { *(.rela.plt) }
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.init : { *(.init) }
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.plt : { *(.plt) }
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.text :
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{
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/* WARNING - the following is hand-optimized to fit within */
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/* the sector layout of our flash chips! XXX FIXME XXX */
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cpu/ppc4xx/start.o (.text)
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/* Align to next NAND block */
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. = ALIGN(0x4000);
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common/environment.o (.ppcenv)
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/* Keep some space here for redundant env and potential bad env blocks */
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. = ALIGN(0x10000);
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*(.text)
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*(.fixup)
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*(.got1)
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}
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_etext = .;
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PROVIDE (etext = .);
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.rodata :
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{
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*(.rodata)
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*(.rodata1)
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*(.rodata.str1.4)
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}
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.fini : { *(.fini) } =0
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.ctors : { *(.ctors) }
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.dtors : { *(.dtors) }
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/* Read-write section, merged into data segment: */
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. = (. + 0x00FF) & 0xFFFFFF00;
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_erotext = .;
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PROVIDE (erotext = .);
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.reloc :
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{
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*(.got)
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_GOT2_TABLE_ = .;
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*(.got2)
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_FIXUP_TABLE_ = .;
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*(.fixup)
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}
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__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
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__fixup_entries = (. - _FIXUP_TABLE_)>>2;
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.data :
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{
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*(.data)
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*(.data1)
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*(.sdata)
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*(.sdata2)
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*(.dynamic)
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CONSTRUCTORS
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}
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_edata = .;
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PROVIDE (edata = .);
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. = .;
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__u_boot_cmd_start = .;
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.u_boot_cmd : { *(.u_boot_cmd) }
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__u_boot_cmd_end = .;
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. = .;
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__start___ex_table = .;
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__ex_table : { *(__ex_table) }
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__stop___ex_table = .;
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. = ALIGN(256);
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__init_begin = .;
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.text.init : { *(.text.init) }
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.data.init : { *(.data.init) }
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. = ALIGN(256);
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__init_end = .;
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__bss_start = .;
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.bss :
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{
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*(.sbss) *(.scommon)
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*(.dynbss)
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*(.bss)
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*(COMMON)
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}
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_end = . ;
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PROVIDE (end = .);
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}
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@ -50,7 +50,7 @@
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#define CFG_FPGA_BASE 0xF0000000
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#define CFG_PERIPHERAL_BASE 0xEF600000 /* internal peripherals*/
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#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
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#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
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#define CFG_MALLOC_LEN (512 * 1024) /* Reserve 512 kB for malloc() */
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#define CFG_MONITOR_BASE (TEXT_BASE)
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/*-----------------------------------------------------------------------
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@ -117,6 +117,71 @@
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#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
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#endif /* CFG_ENV_IS_IN_FLASH */
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/*
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* IPL (Initial Program Loader, integrated inside CPU)
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* Will load first 4k from NAND (SPL) into cache and execute it from there.
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*
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* SPL (Secondary Program Loader)
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* Will load special U-Boot version (NUB) from NAND and execute it. This SPL
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* has to fit into 4kByte. It sets up the CPU and configures the SDRAM
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* controller and the NAND controller so that the special U-Boot image can be
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* loaded from NAND to SDRAM.
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*
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* NUB (NAND U-Boot)
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* This NAND U-Boot (NUB) is a special U-Boot version which can be started
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* from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
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*
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* On 440EPx the SPL is copied to SDRAM before the NAND controller is
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* set up. While still running from cache, I experienced problems accessing
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* the NAND controller. sr - 2006-08-25
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*/
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#define CFG_NAND_BOOT_SPL_SRC 0xfffff000 /* SPL location */
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#define CFG_NAND_BOOT_SPL_SIZE (4 << 10) /* SPL size */
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#define CFG_NAND_BOOT_SPL_DST 0x00800000 /* Copy SPL here */
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#define CFG_NAND_U_BOOT_DST 0x01000000 /* Load NUB to this addr */
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#define CFG_NAND_U_BOOT_START CFG_NAND_U_BOOT_DST /* Start NUB from this addr */
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#define CFG_NAND_BOOT_SPL_DELTA (CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)
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/*
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* Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
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*/
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#define CFG_NAND_U_BOOT_OFFS (16 << 10) /* Offset to RAM U-Boot image */
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#define CFG_NAND_U_BOOT_SIZE (384 << 10) /* Size of RAM U-Boot image */
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/*
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* Now the NAND chip has to be defined (no autodetection used!)
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*/
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#define CFG_NAND_PAGE_SIZE 512 /* NAND chip page size */
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#define CFG_NAND_BLOCK_SIZE (16 << 10) /* NAND chip block size */
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#define CFG_NAND_PAGE_COUNT 32 /* NAND chip page count */
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#define CFG_NAND_BAD_BLOCK_POS 5 /* Location of bad block marker */
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#define CFG_NAND_4_ADDR_CYCLE 1 /* Fourth addr used (>32MB) */
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#define CFG_NAND_ECCSIZE 256
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#define CFG_NAND_ECCBYTES 3
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#define CFG_NAND_ECCSTEPS (CFG_NAND_PAGE_SIZE / CFG_NAND_ECCSIZE)
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#define CFG_NAND_OOBSIZE 16
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#define CFG_NAND_ECCTOTAL (CFG_NAND_ECCBYTES * CFG_NAND_ECCSTEPS)
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#define CFG_NAND_ECCPOS {0, 1, 2, 3, 6, 7}
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#ifdef CFG_ENV_IS_IN_NAND
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/*
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* For NAND booting the environment is embedded in the U-Boot image. Please take
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* look at the file board/amcc/sequoia/u-boot-nand.lds for details.
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*/
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#define CFG_ENV_SIZE CFG_NAND_BLOCK_SIZE
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#define CFG_ENV_OFFSET (CFG_NAND_U_BOOT_OFFS + CFG_ENV_SIZE)
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#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE)
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#endif
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/*-----------------------------------------------------------------------
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* NAND FLASH
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*----------------------------------------------------------------------*/
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#define CFG_MAX_NAND_DEVICE 1
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#define NAND_MAX_CHIPS 1
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#define CFG_NAND_BASE (CFG_NAND_ADDR + CFG_NAND_CS)
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#define CFG_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
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/*-----------------------------------------------------------------------
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* DDR SDRAM
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*----------------------------------------------------------------------*/
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@ -332,6 +397,18 @@
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/*-----------------------------------------------------------------------
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* External Bus Controller (EBC) Setup
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*----------------------------------------------------------------------*/
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#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
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/* booting from NAND, so NAND chips select has to be on CS 0 */
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#define CFG_NAND_CS 0 /* NAND chip connected to CSx */
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/* Memory Bank 1 (NOR-FLASH) initialization */
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#define CFG_EBC_PB1AP 0x05806500
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#define CFG_EBC_PB1CR 0xFC0DA000 /* BAS=0xFC0,BS=64MB,BU=R/W,BW=16bit*/
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/* Memory Bank 0 (NAND-FLASH) initialization */
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#define CFG_EBC_PB0AP 0x018003c0
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#define CFG_EBC_PB0CR (CFG_NAND_ADDR | 0x1e000)
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#else
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#define CFG_NAND_CS 1 /* NAND chip connected to CSx */
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/* Memory Bank 0 (NOR-FLASH) initialization */
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@ -341,6 +418,7 @@
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/* Memory Bank 1 (NAND-FLASH) initialization */
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#define CFG_EBC_PB1AP 0x018003c0
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#define CFG_EBC_PB1CR (CFG_NAND_ADDR | 0x1e000)
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#endif
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/* Memory Bank 2 (FPGA) initialization */
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#define CFG_EBC_PB2AP 0x9400C800
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@ -348,14 +426,6 @@
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#define CFG_EBC_CFG 0x7FC00000 /* EBC0_CFG */
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/*-----------------------------------------------------------------------
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* NAND FLASH
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*----------------------------------------------------------------------*/
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#define CFG_MAX_NAND_DEVICE 1
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#define NAND_MAX_CHIPS 1
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#define CFG_NAND_BASE (CFG_NAND_ADDR + CFG_NAND_CS)
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#define CFG_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
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/*-----------------------------------------------------------------------
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* GPIO Setup
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*----------------------------------------------------------------------*/
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108
nand_spl/board/amcc/kilauea/Makefile
Normal file
108
nand_spl/board/amcc/kilauea/Makefile
Normal file
@ -0,0 +1,108 @@
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#
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# (C) Copyright 2007
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# Stefan Roese, DENX Software Engineering, sr@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
|
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
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LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
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LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
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AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o init.o resetvec.o cache.o
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COBJS = memory.o nand_boot.o nand_ecc.o ndfc.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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__OBJS := $(SOBJS) $(COBJS)
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LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
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nandobj := $(OBJTREE)/nand_spl/
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ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
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all: $(obj).depend $(ALL)
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$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
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$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
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$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
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$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
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$(nandobj)u-boot-spl: $(OBJS)
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cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
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-Map $(nandobj)u-boot-spl.map \
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-o $(nandobj)u-boot-spl
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# create symbolic links for common files
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# from cpu directory
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$(obj)cache.S:
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@rm -f $(obj)cache.S
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ln -s $(SRCTREE)/cpu/ppc4xx/cache.S $(obj)cache.S
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$(obj)ndfc.c:
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@rm -f $(obj)ndfc.c
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ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
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$(obj)resetvec.S:
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@rm -f $(obj)resetvec.S
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ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
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$(obj)start.S:
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@rm -f $(obj)start.S
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ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
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# from board directory
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$(obj)init.S:
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@rm -f $(obj)init.S
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ln -s $(SRCTREE)/board/amcc/kilauea/init.S $(obj)init.S
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$(obj)memory.c:
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@rm -f $(obj)memory.c
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ln -s $(SRCTREE)/board/amcc/kilauea/memory.c $(obj)memory.c
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# from nand_spl directory
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$(obj)nand_boot.c:
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@rm -f $(obj)nand_boot.c
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ln -s $(SRCTREE)/nand_spl/nand_boot.c $(obj)nand_boot.c
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||||
# from drivers/nand directory
|
||||
$(obj)nand_ecc.c:
|
||||
@rm -f $(obj)nand_ecc.c
|
||||
ln -s $(SRCTREE)/drivers/nand/nand_ecc.c $(obj)nand_ecc.c
|
||||
|
||||
#########################################################################
|
||||
|
||||
$(obj)%.o: $(obj)%.S
|
||||
$(CC) $(AFLAGS) -c -o $@ $<
|
||||
|
||||
$(obj)%.o: $(obj)%.c
|
||||
$(CC) $(CFLAGS) -c -o $@ $<
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
47
nand_spl/board/amcc/kilauea/config.mk
Normal file
47
nand_spl/board/amcc/kilauea/config.mk
Normal file
@ -0,0 +1,47 @@
|
||||
#
|
||||
# (C) Copyright 2007
|
||||
# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
#
|
||||
# AMCC 405EX Reference Platform (Kilauea) board
|
||||
#
|
||||
|
||||
#
|
||||
# TEXT_BASE for SPL:
|
||||
#
|
||||
# On 4xx platforms the SPL is located at 0xfffff000...0xffffffff,
|
||||
# in the last 4kBytes of memory space in cache.
|
||||
# We will copy this SPL into instruction-cache in start.S. So we set
|
||||
# TEXT_BASE to starting address in i-cache here.
|
||||
#
|
||||
TEXT_BASE = 0x00800000
|
||||
|
||||
# PAD_TO used to generate a 16kByte binary needed for the combined image
|
||||
# -> PAD_TO = TEXT_BASE + 0x4000
|
||||
PAD_TO = 0x00804000
|
||||
|
||||
ifeq ($(debug),1)
|
||||
PLATFORM_CPPFLAGS += -DDEBUG
|
||||
endif
|
||||
|
||||
ifeq ($(dbcr),1)
|
||||
PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
|
||||
endif
|
64
nand_spl/board/amcc/kilauea/u-boot.lds
Normal file
64
nand_spl/board/amcc/kilauea/u-boot.lds
Normal file
@ -0,0 +1,64 @@
|
||||
/*
|
||||
* (C) Copyright 2007
|
||||
* Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(powerpc:common)
|
||||
SECTIONS
|
||||
{
|
||||
.resetvec 0x00800FFC :
|
||||
{
|
||||
*(.resetvec)
|
||||
} = 0xffff
|
||||
|
||||
.text :
|
||||
{
|
||||
start.o (.text)
|
||||
init.o (.text)
|
||||
nand_boot.o (.text)
|
||||
ndfc.o (.text)
|
||||
|
||||
*(.text)
|
||||
*(.fixup)
|
||||
}
|
||||
_etext = .;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.rodata*)
|
||||
*(.data*)
|
||||
*(.sdata*)
|
||||
__got2_start = .;
|
||||
*(.got2)
|
||||
__got2_end = .;
|
||||
}
|
||||
|
||||
_edata = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.sbss)
|
||||
*(.bss)
|
||||
}
|
||||
|
||||
_end = . ;
|
||||
}
|
Loading…
Reference in New Issue
Block a user