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ARM: tegra: pull Tegra124 SoC DT from Linux v4.7

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The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.

Main changes:
* USB phy_type property is aligned with the kernel, so board files are
  updated so the final DT content doesn't change. I'm not convinved that
  Nyan uses HSIC phy_type. However, I'd rather this change be a no-op,
  and any DT bug-fixes be separate.
* Sync misc changes from the kernel: missing DT content, minor compatible
  value fixes, typos.

Remaining deltas relative to the Linux DT:
* U-Boot uses #address-cells/#size-cells of 1 whereas the kernel uses 2.
  I believe U-Boot's DT parsing currently assumes that these values match
  the physical address size, so I didn't synchronize this part of the DT.
* U-Boot uses the original XUSB PHY DT binding, wherease the kernel DT
  has moved to a newer version. Thus, XUSB client nodes include properties
  names phys and phy-names that do not appear in the kernel, and don't
  include pad definitions in the padctl node.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Stephen Warren 2016-09-13 10:45:53 -06:00 committed by Tom Warren
parent 5c31e7abb4
commit 3b8c1b3b22
3 changed files with 55 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/dts/tegra124-nyan.dtsi
View File

@ -424,10 +424,12 @@
usb@7d004000 { /* Internal webcam. */
status = "okay";
phy_type = "hsic";
};
usb-phy@7d004000 {
status = "okay";
phy_type = "hsic";
vbus-supply = <&vdd_run_cam>;
};

59
arch/arm/dts/tegra124.dtsi
View File

@ -196,13 +196,18 @@
lic: interrupt-controller@60004000 {
compatible = "nvidia,tegra124-ictlr", "nvidia,tegra30-ictlr";
reg = <0x0 0x60004000 0x0 0x100>,
<0x0 0x60004100 0x0 0x100>,
<0x0 0x60004200 0x0 0x100>,
<0x0 0x60004300 0x0 0x100>,
<0x0 0x60004400 0x0 0x100>;
interrupt-controller;
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
};
timer@60005000 {
compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
compatible = "nvidia,tegra124-timer", "nvidia,tegra30-timer", "nvidia,tegra20-timer";
reg = <0x60005000 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
@ -316,7 +321,7 @@
* driver and APB DMA based serial driver for higher baudrate
* and performace. To enable the 8250 based driver, the compatible
* is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
* the APB DMA based serial driver, the comptible is
* the APB DMA based serial driver, the compatible is
* "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
*/
uarta: serial@70006000 {
@ -399,10 +404,15 @@
i2c@7000c400 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x7000c400 0x100>;
interrupts = <0 84 0x04>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 54>;
clocks = <&tegra_car TEGRA124_CLK_I2C2>;
clock-names = "div-clk";
resets = <&tegra_car 54>;
reset-names = "i2c";
dmas = <&apbdma 22>, <&apbdma 22>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -631,6 +641,41 @@
status = "disabled";
};
usb@70090000 {
compatible = "nvidia,tegra124-xusb";
reg = <0x70090000 0x8000>,
<0x70098000 0x1000>,
<0x70099000 0x1000>;
reg-names = "hcd", "fpci", "ipfs";
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
<&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_SS>,
<&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
<&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA124_CLK_PLL_U_480M>,
<&tegra_car TEGRA124_CLK_CLK_M>,
<&tegra_car TEGRA124_CLK_PLL_E>;
clock-names = "xusb_host", "xusb_host_src",
"xusb_falcon_src", "xusb_ss",
"xusb_ss_div2", "xusb_ss_src",
"xusb_hs_src", "xusb_fs_src",
"pll_u_480m", "clk_m", "pll_e";
resets = <&tegra_car 89>, <&tegra_car 156>,
<&tegra_car 143>;
reset-names = "xusb_host", "xusb_ss", "xusb_src";
nvidia,xusb-padctl = <&padctl>;
status = "disabled";
};
padctl: padctl@7009f000 {
compatible = "nvidia,tegra124-xusb-padctl";
reg = <0x7009f000 0x1000>;
@ -820,7 +865,7 @@
};
usb@7d000000 {
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x7d000000 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
@ -857,10 +902,10 @@
};
usb@7d004000 {
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x7d004000 0x4000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "hsic";
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB2>;
resets = <&tegra_car 58>;
reset-names = "usb";

1
include/dt-bindings/thermal/tegra124-soctherm.h
View File

@ -9,5 +9,6 @@
#define TEGRA124_SOCTHERM_SENSOR_MEM 1
#define TEGRA124_SOCTHERM_SENSOR_GPU 2
#define TEGRA124_SOCTHERM_SENSOR_PLLX 3
#define TEGRA124_SOCTHERM_SENSOR_NUM 4
#endif