leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

board: ti: DRA7: Add DP83867 TI phy for rev c

Browse Source 
Enable the TI DP83867 Giga bit phy on the
dra7 rev c board.  The rx and tx internal
delays are need for this board so the usage
of RGMII_ID is required.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Dan Murphy 2016-03-30 12:58:37 -05:00 committed by Tom Rini
parent 38ce65e1fe
commit 39fbac91e1
2 changed files with 7 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
board/ti/dra7xx/evm.c
View File

@ -27,6 +27,7 @@
#include <dwc3-uboot.h>
#include <dwc3-omap-uboot.h>
#include <ti-usb-phy-uboot.h>
#include <miiphy.h>
#include "mux_data.h"
#include "../common/board_detect.h"
@ -679,6 +680,11 @@ int board_eth_init(bd_t *bis)
if (*omap_si_rev == DRA722_ES1_0)
cpsw_data.active_slave = 1;
if (board_is_dra72x_revc_or_later()) {
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
}
ret = cpsw_register(&cpsw_data);
if (ret < 0)
printf("Error %d registering CPSW switch\n", ret);

1
include/configs/dra7xx_evm.h
View File

@ -155,6 +155,7 @@
#define CONFIG_MII /* Required in net/eth.c */
#define CONFIG_PHY_GIGE /* per-board part of CPSW */
#define CONFIG_PHYLIB
#define CONFIG_PHY_TI
/* SPI */
#undef CONFIG_OMAP3_SPI