powerpc: dts: add QorIQ DPAA 1 FMan device tree nodes
Add the QorIQ DPAA Frame Manager device tree nodes description. The device tree fragments are copied over with little modification from the Linux kernel source code. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Madalin Bucur
Priyanka Jain
parent
55168c03a5
commit
37fa0b07b4
37
arch/powerpc/dts/qoriq-fman-0-10g-0.dtsi
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37
arch/powerpc/dts/qoriq-fman-0-10g-0.dtsi
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@ -0,0 +1,37 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x400000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*
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*/
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fman@400000 {
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fman0_rx_0x10: port@90000 {
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cell-index = <0x10>;
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compatible = "fsl,fman-v2-port-rx";
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reg = <0x90000 0x1000>;
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};
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fman0_tx_0x30: port@b0000 {
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cell-index = <0x30>;
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compatible = "fsl,fman-v2-port-tx";
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reg = <0xb0000 0x1000>;
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};
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ethernet@f0000 {
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cell-index = <0x8>;
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compatible = "fsl,fman-xgec";
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reg = <0xf0000 0x1000>;
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fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
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};
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xmdio0: mdio@f1000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,fman-xmdio";
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reg = <0xf1000 0x1000>;
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interrupts = <101 2 0 0>;
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};
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};
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44
arch/powerpc/dts/qoriq-fman-0-1g-0.dtsi
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44
arch/powerpc/dts/qoriq-fman-0-1g-0.dtsi
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@ -0,0 +1,44 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x400000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*
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*/
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fman@400000 {
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fman0_rx_0x08: port@88000 {
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cell-index = <0x8>;
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compatible = "fsl,fman-v2-port-rx";
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reg = <0x88000 0x1000>;
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};
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fman0_tx_0x28: port@a8000 {
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cell-index = <0x28>;
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compatible = "fsl,fman-v2-port-tx";
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reg = <0xa8000 0x1000>;
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};
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ethernet@e0000 {
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cell-index = <0>;
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compatible = "fsl,fman-dtsec";
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reg = <0xe0000 0x1000>;
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fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
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tbi-handle = <&tbi0>;
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ptp-timer = <&ptp_timer0>;
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};
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mdio0: mdio@e1120 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,fman-mdio";
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reg = <0xe1120 0xee0>;
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interrupts = <100 2 0 0>;
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tbi0: tbi-phy@8 {
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reg = <0x8>;
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device_type = "tbi-phy";
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};
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};
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};
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43
arch/powerpc/dts/qoriq-fman-0-1g-1.dtsi
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43
arch/powerpc/dts/qoriq-fman-0-1g-1.dtsi
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@ -0,0 +1,43 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan 1g port #1 device tree stub [ controller @ offset 0x400000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*
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*/
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fman@400000 {
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fman0_rx_0x09: port@89000 {
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cell-index = <0x9>;
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compatible = "fsl,fman-v2-port-rx";
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reg = <0x89000 0x1000>;
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};
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fman0_tx_0x29: port@a9000 {
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cell-index = <0x29>;
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compatible = "fsl,fman-v2-port-tx";
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reg = <0xa9000 0x1000>;
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};
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ethernet@e2000 {
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cell-index = <1>;
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compatible = "fsl,fman-dtsec";
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reg = <0xe2000 0x1000>;
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fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
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tbi-handle = <&tbi1>;
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ptp-timer = <&ptp_timer0>;
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};
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mdio@e3120 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,fman-mdio";
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reg = <0xe3120 0xee0>;
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tbi1: tbi-phy@8 {
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reg = <0x8>;
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device_type = "tbi-phy";
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};
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};
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};
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43
arch/powerpc/dts/qoriq-fman-0-1g-2.dtsi
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43
arch/powerpc/dts/qoriq-fman-0-1g-2.dtsi
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@ -0,0 +1,43 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan 1g port #2 device tree stub [ controller @ offset 0x400000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*
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*/
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fman@400000 {
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fman0_rx_0x0a: port@8a000 {
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cell-index = <0xa>;
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compatible = "fsl,fman-v2-port-rx";
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reg = <0x8a000 0x1000>;
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};
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fman0_tx_0x2a: port@aa000 {
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cell-index = <0x2a>;
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compatible = "fsl,fman-v2-port-tx";
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reg = <0xaa000 0x1000>;
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};
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ethernet@e4000 {
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cell-index = <2>;
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compatible = "fsl,fman-dtsec";
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reg = <0xe4000 0x1000>;
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fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
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tbi-handle = <&tbi2>;
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ptp-timer = <&ptp_timer0>;
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};
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mdio@e5120 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,fman-mdio";
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reg = <0xe5120 0xee0>;
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tbi2: tbi-phy@8 {
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reg = <0x8>;
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device_type = "tbi-phy";
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};
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};
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};
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43
arch/powerpc/dts/qoriq-fman-0-1g-3.dtsi
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43
arch/powerpc/dts/qoriq-fman-0-1g-3.dtsi
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@ -0,0 +1,43 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x400000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*
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*/
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fman@400000 {
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fman0_rx_0x0b: port@8b000 {
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cell-index = <0xb>;
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compatible = "fsl,fman-v2-port-rx";
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reg = <0x8b000 0x1000>;
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};
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fman0_tx_0x2b: port@ab000 {
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cell-index = <0x2b>;
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compatible = "fsl,fman-v2-port-tx";
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reg = <0xab000 0x1000>;
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};
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ethernet@e6000 {
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cell-index = <3>;
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compatible = "fsl,fman-dtsec";
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reg = <0xe6000 0x1000>;
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fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
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tbi-handle = <&tbi3>;
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ptp-timer = <&ptp_timer0>;
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};
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mdio@e7120 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,fman-mdio";
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reg = <0xe7120 0xee0>;
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tbi3: tbi-phy@8 {
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reg = <0x8>;
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device_type = "tbi-phy";
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};
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};
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};
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43
arch/powerpc/dts/qoriq-fman-0-1g-4.dtsi
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43
arch/powerpc/dts/qoriq-fman-0-1g-4.dtsi
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@ -0,0 +1,43 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan 1g port #4 device tree stub [ controller @ offset 0x400000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*
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*/
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fman@400000 {
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fman0_rx_0x0c: port@8c000 {
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cell-index = <0xc>;
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compatible = "fsl,fman-v2-port-rx";
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reg = <0x8c000 0x1000>;
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};
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fman0_tx_0x2c: port@ac000 {
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cell-index = <0x2c>;
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compatible = "fsl,fman-v2-port-tx";
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reg = <0xac000 0x1000>;
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};
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ethernet@e8000 {
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cell-index = <4>;
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compatible = "fsl,fman-dtsec";
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reg = <0xe8000 0x1000>;
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fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
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tbi-handle = <&tbi4>;
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ptp-timer = <&ptp_timer0>;
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};
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mdio@e9120 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,fman-mdio";
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reg = <0xe9120 0xee0>;
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tbi4: tbi-phy@8 {
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reg = <0x8>;
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device_type = "tbi-phy";
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};
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};
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};
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79
arch/powerpc/dts/qoriq-fman-0.dtsi
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79
arch/powerpc/dts/qoriq-fman-0.dtsi
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@ -0,0 +1,79 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan device tree stub [ controller @ offset 0x400000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*
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*/
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fman0: fman@400000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <0>;
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compatible = "fsl,fman";
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ranges = <0 0x400000 0xfe000>;
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reg = <0x400000 0xfe000>;
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interrupts = <96 2 0 0>, <16 2 1 1>;
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clocks = <&clockgen 3 0>;
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clock-names = "fmanclk";
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fsl,qman-channel-range = <0x40 0xc>;
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ptimer-handle = <&ptp_timer0>;
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muram@0 {
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compatible = "fsl,fman-muram";
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reg = <0x0 0x28000>;
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};
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fman0_oh_0x1: port@81000 {
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cell-index = <0x1>;
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compatible = "fsl,fman-v2-port-oh";
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reg = <0x81000 0x1000>;
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};
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fman0_oh_0x2: port@82000 {
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cell-index = <0x2>;
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compatible = "fsl,fman-v2-port-oh";
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reg = <0x82000 0x1000>;
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};
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fman0_oh_0x3: port@83000 {
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cell-index = <0x3>;
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compatible = "fsl,fman-v2-port-oh";
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reg = <0x83000 0x1000>;
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};
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fman0_oh_0x4: port@84000 {
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cell-index = <0x4>;
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compatible = "fsl,fman-v2-port-oh";
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reg = <0x84000 0x1000>;
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};
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fman0_oh_0x5: port@85000 {
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cell-index = <0x5>;
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compatible = "fsl,fman-v2-port-oh";
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reg = <0x85000 0x1000>;
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status = "disabled";
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};
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fman0_oh_0x6: port@86000 {
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cell-index = <0x6>;
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compatible = "fsl,fman-v2-port-oh";
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reg = <0x86000 0x1000>;
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status = "disabled";
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};
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fman0_oh_0x7: port@87000 {
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cell-index = <0x7>;
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compatible = "fsl,fman-v2-port-oh";
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reg = <0x87000 0x1000>;
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status = "disabled";
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};
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};
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ptp_timer0: ptp-timer@4fe000 {
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compatible = "fsl,fman-ptp-timer";
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reg = <0x4fe000 0x1000>;
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interrupts = <96 2 0 0>;
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clocks = <&clockgen 3 0>;
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};
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36
arch/powerpc/dts/qoriq-fman-1-10g-0.dtsi
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36
arch/powerpc/dts/qoriq-fman-1-10g-0.dtsi
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@ -0,0 +1,36 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x500000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*
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*/
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fman@500000 {
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fman1_rx_0x10: port@90000 {
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cell-index = <0x10>;
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compatible = "fsl,fman-v2-port-rx";
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reg = <0x90000 0x1000>;
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};
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fman1_tx_0x30: port@b0000 {
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cell-index = <0x30>;
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compatible = "fsl,fman-v2-port-tx";
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reg = <0xb0000 0x1000>;
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};
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ethernet@f0000 {
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cell-index = <0x8>;
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compatible = "fsl,fman-xgec";
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reg = <0xf0000 0x1000>;
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fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
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};
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mdio@f1000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,fman-xmdio";
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reg = <0xf1000 0x1000>;
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};
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};
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43
arch/powerpc/dts/qoriq-fman-1-1g-0.dtsi
Normal file
43
arch/powerpc/dts/qoriq-fman-1-1g-0.dtsi
Normal file
@ -0,0 +1,43 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x500000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*
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*/
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fman@500000 {
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fman1_rx_0x08: port@88000 {
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cell-index = <0x8>;
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compatible = "fsl,fman-v2-port-rx";
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reg = <0x88000 0x1000>;
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};
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fman1_tx_0x28: port@a8000 {
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cell-index = <0x28>;
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compatible = "fsl,fman-v2-port-tx";
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reg = <0xa8000 0x1000>;
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};
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ethernet@e0000 {
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cell-index = <0>;
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compatible = "fsl,fman-dtsec";
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reg = <0xe0000 0x1000>;
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fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>;
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tbi-handle = <&tbi5>;
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ptp-timer = <&ptp_timer1>;
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};
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mdio@e1120 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,fman-mdio";
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reg = <0xe1120 0xee0>;
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tbi5: tbi-phy@8 {
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reg = <0x8>;
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device_type = "tbi-phy";
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};
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};
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};
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43
arch/powerpc/dts/qoriq-fman-1-1g-1.dtsi
Normal file
43
arch/powerpc/dts/qoriq-fman-1-1g-1.dtsi
Normal file
@ -0,0 +1,43 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* QorIQ FMan 1g port #1 device tree stub [ controller @ offset 0x500000 ]
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*
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* Copyright 2011 - 2015 Freescale Semiconductor Inc.
|
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* Copyright 2020 NXP
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*
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*/
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fman@500000 {
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fman1_rx_0x09: port@89000 {
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cell-index = <0x9>;
|
||||
compatible = "fsl,fman-v2-port-rx";
|
||||
reg = <0x89000 0x1000>;
|
||||
};
|
||||
|
||||
fman1_tx_0x29: port@a9000 {
|
||||
cell-index = <0x29>;
|
||||
compatible = "fsl,fman-v2-port-tx";
|
||||
reg = <0xa9000 0x1000>;
|
||||
};
|
||||
|
||||
ethernet@e2000 {
|
||||
cell-index = <1>;
|
||||
compatible = "fsl,fman-dtsec";
|
||||
reg = <0xe2000 0x1000>;
|
||||
fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
|
||||
tbi-handle = <&tbi6>;
|
||||
ptp-timer = <&ptp_timer1>;
|
||||
};
|
||||
|
||||
mdio@e3120 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,fman-mdio";
|
||||
reg = <0xe3120 0xee0>;
|
||||
|
||||
tbi6: tbi-phy@8 {
|
||||
reg = <0x8>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
43
arch/powerpc/dts/qoriq-fman-1-1g-2.dtsi
Normal file
43
arch/powerpc/dts/qoriq-fman-1-1g-2.dtsi
Normal file
@ -0,0 +1,43 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* QorIQ FMan 1g port #2 device tree stub [ controller @ offset 0x500000 ]
|
||||
*
|
||||
* Copyright 2011 - 2015 Freescale Semiconductor Inc.
|
||||
* Copyright 2020 NXP
|
||||
*
|
||||
*/
|
||||
|
||||
fman@500000 {
|
||||
fman1_rx_0x0a: port@8a000 {
|
||||
cell-index = <0xa>;
|
||||
compatible = "fsl,fman-v2-port-rx";
|
||||
reg = <0x8a000 0x1000>;
|
||||
};
|
||||
|
||||
fman1_tx_0x2a: port@aa000 {
|
||||
cell-index = <0x2a>;
|
||||
compatible = "fsl,fman-v2-port-tx";
|
||||
reg = <0xaa000 0x1000>;
|
||||
};
|
||||
|
||||
ethernet@e4000 {
|
||||
cell-index = <2>;
|
||||
compatible = "fsl,fman-dtsec";
|
||||
reg = <0xe4000 0x1000>;
|
||||
fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
|
||||
tbi-handle = <&tbi7>;
|
||||
ptp-timer = <&ptp_timer1>;
|
||||
};
|
||||
|
||||
mdio@e5120 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,fman-mdio";
|
||||
reg = <0xe5120 0xee0>;
|
||||
|
||||
tbi7: tbi-phy@8 {
|
||||
reg = <0x8>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
43
arch/powerpc/dts/qoriq-fman-1-1g-3.dtsi
Normal file
43
arch/powerpc/dts/qoriq-fman-1-1g-3.dtsi
Normal file
@ -0,0 +1,43 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x500000 ]
|
||||
*
|
||||
* Copyright 2011 - 2015 Freescale Semiconductor Inc.
|
||||
* Copyright 2020 NXP
|
||||
*
|
||||
*/
|
||||
|
||||
fman@500000 {
|
||||
fman1_rx_0x0b: port@8b000 {
|
||||
cell-index = <0xb>;
|
||||
compatible = "fsl,fman-v2-port-rx";
|
||||
reg = <0x8b000 0x1000>;
|
||||
};
|
||||
|
||||
fman1_tx_0x2b: port@ab000 {
|
||||
cell-index = <0x2b>;
|
||||
compatible = "fsl,fman-v2-port-tx";
|
||||
reg = <0xab000 0x1000>;
|
||||
};
|
||||
|
||||
ethernet@e6000 {
|
||||
cell-index = <3>;
|
||||
compatible = "fsl,fman-dtsec";
|
||||
reg = <0xe6000 0x1000>;
|
||||
fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
|
||||
tbi-handle = <&tbi8>;
|
||||
ptp-timer = <&ptp_timer1>;
|
||||
};
|
||||
|
||||
mdio@e7120 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,fman-mdio";
|
||||
reg = <0xe7120 0xee0>;
|
||||
|
||||
tbi8: tbi-phy@8 {
|
||||
reg = <0x8>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
43
arch/powerpc/dts/qoriq-fman-1-1g-4.dtsi
Normal file
43
arch/powerpc/dts/qoriq-fman-1-1g-4.dtsi
Normal file
@ -0,0 +1,43 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* QorIQ FMan 1g port #4 device tree stub [ controller @ offset 0x500000 ]
|
||||
*
|
||||
* Copyright 2011 - 2015 Freescale Semiconductor Inc.
|
||||
* Copyright 2020 NXP
|
||||
*
|
||||
*/
|
||||
|
||||
fman@500000 {
|
||||
fman1_rx_0x0c: port@8c000 {
|
||||
cell-index = <0xc>;
|
||||
compatible = "fsl,fman-v2-port-rx";
|
||||
reg = <0x8c000 0x1000>;
|
||||
};
|
||||
|
||||
fman1_tx_0x2c: port@ac000 {
|
||||
cell-index = <0x2c>;
|
||||
compatible = "fsl,fman-v2-port-tx";
|
||||
reg = <0xac000 0x1000>;
|
||||
};
|
||||
|
||||
ethernet@e8000 {
|
||||
cell-index = <4>;
|
||||
compatible = "fsl,fman-dtsec";
|
||||
reg = <0xe8000 0x1000>;
|
||||
fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>;
|
||||
tbi-handle = <&tbi9>;
|
||||
ptp-timer = <&ptp_timer1>;
|
||||
};
|
||||
|
||||
mdio@e9120 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,fman-mdio";
|
||||
reg = <0xe9120 0xee0>;
|
||||
|
||||
tbi9: tbi-phy@8 {
|
||||
reg = <0x8>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
79
arch/powerpc/dts/qoriq-fman-1.dtsi
Normal file
79
arch/powerpc/dts/qoriq-fman-1.dtsi
Normal file
@ -0,0 +1,79 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* QorIQ FMan device tree stub [ controller @ offset 0x500000 ]
|
||||
*
|
||||
* Copyright 2011 - 2015 Freescale Semiconductor Inc.
|
||||
* Copyright 2020 NXP
|
||||
*
|
||||
*/
|
||||
|
||||
fman1: fman@500000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl,fman";
|
||||
ranges = <0 0x500000 0xfe000>;
|
||||
reg = <0x500000 0xfe000>;
|
||||
interrupts = <97 2 0 0>, <16 2 1 0>;
|
||||
clocks = <&clockgen 3 1>;
|
||||
clock-names = "fmanclk";
|
||||
fsl,qman-channel-range = <0x60 0xc>;
|
||||
ptimer-handle = <&ptp_timer1>;
|
||||
|
||||
muram@0 {
|
||||
compatible = "fsl,fman-muram";
|
||||
reg = <0x0 0x28000>;
|
||||
};
|
||||
|
||||
fman1_oh_0x1: port@81000 {
|
||||
cell-index = <0x1>;
|
||||
compatible = "fsl,fman-v2-port-oh";
|
||||
reg = <0x81000 0x1000>;
|
||||
};
|
||||
|
||||
fman1_oh_0x2: port@82000 {
|
||||
cell-index = <0x2>;
|
||||
compatible = "fsl,fman-v2-port-oh";
|
||||
reg = <0x82000 0x1000>;
|
||||
};
|
||||
|
||||
fman1_oh_0x3: port@83000 {
|
||||
cell-index = <0x3>;
|
||||
compatible = "fsl,fman-v2-port-oh";
|
||||
reg = <0x83000 0x1000>;
|
||||
};
|
||||
|
||||
fman1_oh_0x4: port@84000 {
|
||||
cell-index = <0x4>;
|
||||
compatible = "fsl,fman-v2-port-oh";
|
||||
reg = <0x84000 0x1000>;
|
||||
};
|
||||
|
||||
fman1_oh_0x5: port@85000 {
|
||||
cell-index = <0x5>;
|
||||
compatible = "fsl,fman-v2-port-oh";
|
||||
reg = <0x85000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fman1_oh_0x6: port@86000 {
|
||||
cell-index = <0x6>;
|
||||
compatible = "fsl,fman-v2-port-oh";
|
||||
reg = <0x86000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fman1_oh_0x7: port@87000 {
|
||||
cell-index = <0x7>;
|
||||
compatible = "fsl,fman-v2-port-oh";
|
||||
reg = <0x87000 0x1000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
ptp_timer1: ptp-timer@5fe000 {
|
||||
compatible = "fsl,fman-ptp-timer";
|
||||
reg = <0x5fe000 0x1000>;
|
||||
interrupts = <97 2 0 0>;
|
||||
clocks = <&clockgen 3 1>;
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user