rockchip: rk3188: Add sysreset driver
Driver for the sysreset of Rockchip rk3188 socs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
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@ -9,6 +9,7 @@ obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
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ifndef CONFIG_SPL_BUILD
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obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
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endif
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obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
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obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
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obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
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obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
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47
drivers/sysreset/sysreset_rk3188.c
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47
drivers/sysreset/sysreset_rk3188.c
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@ -0,0 +1,47 @@
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/*
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* (C) Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <sysreset.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/cru_rk3188.h>
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#include <asm/arch/hardware.h>
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#include <linux/err.h>
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int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
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{
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struct rk3188_cru *cru = rockchip_get_cru();
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if (IS_ERR(cru))
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return PTR_ERR(cru);
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switch (type) {
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case SYSRESET_WARM:
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rk_clrreg(&cru->cru_mode_con, 0xffff);
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writel(0xeca8, &cru->cru_glb_srst_snd_value);
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break;
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case SYSRESET_COLD:
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rk_clrreg(&cru->cru_mode_con, 0xffff);
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writel(0xfdb9, &cru->cru_glb_srst_fst_value);
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break;
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default:
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return -EPROTONOSUPPORT;
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}
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return -EINPROGRESS;
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}
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static struct sysreset_ops rk3188_sysreset = {
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.request = rk3188_sysreset_request,
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};
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U_BOOT_DRIVER(sysreset_rk3188) = {
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.name = "rk3188_sysreset",
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.id = UCLASS_SYSRESET,
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.ops = &rk3188_sysreset,
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};
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