ARM: remove broken "cmc_pu2" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk
Albert ARIBAUD
parent
b550834458
commit
37a9b4d0b7
@ -1,50 +0,0 @@
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#
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# (C) Copyright 2003-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS := cmc_pu2.o flash.o load_sernum_ethaddr.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,192 +0,0 @@
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/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* Modified for CMC_PU2 (removed Smart Media support) by Gary Jennejohn
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* (2004) garyj@denx.de
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*
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* Modified for CMC_BASIC by Martin Krause (2005), TQ-Systems GmbH
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/mach-types.h>
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#include <asm/arch/AT91RM9200.h>
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#include <asm/io.h>
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#include <netdev.h>
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#if defined(CONFIG_DRIVER_ETHER)
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#include <at91rm9200_net.h>
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#include <dm9161.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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/*
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* Miscelaneous platform dependent initialisations
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*/
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#define CMC_HP_BASIC 1
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#define CMC_PU2 2
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#define CMC_BASIC 4
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int hw_detect (void);
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int board_init (void)
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{
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AT91PS_PIO piob = AT91C_BASE_PIOB;
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AT91PS_PIO pioc = AT91C_BASE_PIOC;
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/* Enable Ctrlc */
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console_init_f ();
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/* Correct IRDA resistor problem */
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/* Set PA23_TXD in Output */
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/* (AT91PS_PIO) AT91C_BASE_PIOA->PIO_OER = AT91C_PA23_TXD2; */
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/* memory and cpu-speed are setup before relocation */
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/* so we do _nothing_ here */
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/* PIOB and PIOC clock enabling */
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*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
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*AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
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/*
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* configure PC0-PC3 as input without pull ups, so RS485 driver enable
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* (CMC-PU2) and digital outputs (CMC-BASIC) are deactivated.
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*/
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pioc->PIO_ODR = AT91C_PIO_PC0 | AT91C_PIO_PC1 |
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AT91C_PIO_PC2 | AT91C_PIO_PC3;
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pioc->PIO_PPUDR = AT91C_PIO_PC0 | AT91C_PIO_PC1 |
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AT91C_PIO_PC2 | AT91C_PIO_PC3;
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pioc->PIO_PER = AT91C_PIO_PC0 | AT91C_PIO_PC1 |
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AT91C_PIO_PC2 | AT91C_PIO_PC3;
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/*
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* On CMC-PU2 board configure PB3-PB6 to input without pull ups to
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* clear the duo LEDs (the external pull downs assure a proper
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* signal). On CMC-BASIC and CMC-HP-BASIC set PB3-PB6 to output and
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* drive it high, to configure current measurement on AINx.
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*/
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if (hw_detect() & CMC_PU2) {
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piob->PIO_ODR = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
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AT91C_PIO_PB5 | AT91C_PIO_PB6;
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}
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else if ((hw_detect() & CMC_BASIC) || (hw_detect() & CMC_HP_BASIC)) {
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piob->PIO_SODR = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
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AT91C_PIO_PB5 | AT91C_PIO_PB6;
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piob->PIO_OER = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
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AT91C_PIO_PB5 | AT91C_PIO_PB6;
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}
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piob->PIO_PPUDR = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
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AT91C_PIO_PB5 | AT91C_PIO_PB6;
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piob->PIO_PER = AT91C_PIO_PB3 | AT91C_PIO_PB4 |
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AT91C_PIO_PB5 | AT91C_PIO_PB6;
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/*
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* arch number of CMC_PU2-Board. MACH_TYPE_CMC_PU2 is not supported in
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* the linuxarm kernel, yet.
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*/
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/* gd->bd->bi_arch_number = MACH_TYPE_CMC_PU2; */
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gd->bd->bi_arch_number = 251;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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return 0;
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}
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int checkboard (void)
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{
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if (hw_detect() & CMC_PU2)
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puts ("Board: CMC-PU2 (Rittal GmbH)\n");
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else if (hw_detect() & CMC_BASIC)
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puts ("Board: CMC-BASIC (Rittal GmbH)\n");
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else if (hw_detect() & CMC_HP_BASIC)
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puts ("Board: CMC-HP-BASIC (Rittal GmbH)\n");
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else
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puts ("Board: unknown\n");
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return 0;
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}
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int hw_detect (void)
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{
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AT91PS_PIO pio = AT91C_BASE_PIOB;
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/* PIOB clock enabling */
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*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
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/* configure PB12 as input without pull up */
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pio->PIO_ODR = AT91C_PIO_PB12;
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pio->PIO_PPUDR = AT91C_PIO_PB12;
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pio->PIO_PER = AT91C_PIO_PB12;
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/* configure PB13 as input without pull up */
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pio->PIO_ODR = AT91C_PIO_PB13;
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pio->PIO_PPUDR = AT91C_PIO_PB13;
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pio->PIO_PER = AT91C_PIO_PB13;
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/* read board identification pin */
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if (pio->PIO_PDSR & AT91C_PIO_PB12)
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return ((pio->PIO_PDSR & AT91C_PIO_PB13)
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? CMC_PU2 : 0);
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else
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return ((pio->PIO_PDSR & AT91C_PIO_PB13)
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? CMC_HP_BASIC : CMC_BASIC);
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}
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#ifdef CONFIG_DRIVER_ETHER
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#if defined(CONFIG_CMD_NET)
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/*
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* Name:
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* at91rm9200_GetPhyInterface
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* Description:
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* Initialise the interface functions to the PHY
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* Arguments:
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* None
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* Return value:
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* None
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*/
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void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
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{
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p_phyops->Init = dm9161_InitPhy;
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p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
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p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
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p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
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}
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#endif
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#endif /* CONFIG_DRIVER_ETHER */
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#ifdef CONFIG_DRIVER_AT91EMAC
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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rc = at91emac_register(bis, 0);
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return rc;
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}
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#endif
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@ -1,3 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0x20F00000
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## For testing: load at 0x20100000 and "go" at 0x201000A4
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#CONFIG_SYS_TEXT_BASE = 0x20100000
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@ -1,469 +0,0 @@
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/*
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* (C) Copyright 2003-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2004
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* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
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*
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* Modified for the CMC PU2 by (C) Copyright 2004 Gary Jennejohn
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* garyj@denx.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#ifndef CONFIG_ENV_ADDR
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
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#endif
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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#define FLASH_CYCLE1 0x0555
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#define FLASH_CYCLE2 0x02AA
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size(vu_short *addr, flash_info_t *info);
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static void flash_reset(flash_info_t *info);
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static int write_word_amd(flash_info_t *info, vu_short *dest, ushort data);
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static flash_info_t *flash_get_info(ulong base);
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/*-----------------------------------------------------------------------
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* flash_init()
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*
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* sets up flash_info and returns size of FLASH (bytes)
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*/
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unsigned long flash_init (void)
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{
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unsigned long size = 0;
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ulong flashbase = CONFIG_SYS_FLASH_BASE;
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/* Init: no FLASHes known */
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memset(&flash_info[0], 0, sizeof(flash_info_t));
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flash_info[0].size = flash_get_size((vu_short *)flashbase, &flash_info[0]);
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size = flash_info[0].size;
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#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
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/* monitor protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CONFIG_SYS_MONITOR_BASE,
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CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
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flash_get_info(CONFIG_SYS_MONITOR_BASE));
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#endif
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#ifdef CONFIG_ENV_IS_IN_FLASH
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/* ENV protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR+CONFIG_ENV_SIZE-1,
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flash_get_info(CONFIG_ENV_ADDR));
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#endif
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return size ? size : 1;
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}
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/*-----------------------------------------------------------------------
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*/
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static void flash_reset(flash_info_t *info)
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{
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vu_short *base = (vu_short *)(info->start[0]);
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/* Put FLASH back in read mode */
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
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*base = 0x00FF; /* Intel Read Mode */
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else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
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*base = 0x00F0; /* AMD Read Mode */
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}
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/*-----------------------------------------------------------------------
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*/
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static flash_info_t *flash_get_info(ulong base)
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{
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int i;
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flash_info_t * info;
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info = NULL;
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i ++) {
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info = & flash_info[i];
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if (info->size && info->start[0] <= base &&
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base <= info->start[0] + info->size - 1)
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break;
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}
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return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_AMD: printf ("AMD "); break;
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case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
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case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
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case FLASH_MAN_SST: printf ("SST "); break;
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case FLASH_MAN_STM: printf ("STM "); break;
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case FLASH_MAN_INTEL: printf ("INTEL "); break;
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default: printf ("Unknown Vendor "); break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_S29GL064M:
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printf ("S29GL064M-R6 (64Mbit, uniform sector size)\n");
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break;
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default:
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printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20,
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info->sector_count);
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printf (" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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if ((i % 5) == 0) {
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printf ("\n ");
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}
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printf (" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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return;
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}
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/*-----------------------------------------------------------------------
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*/
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/*
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* The following code cannot be run from FLASH!
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*/
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ulong flash_get_size (vu_short *addr, flash_info_t *info)
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{
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int i;
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ushort value;
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ulong base = (ulong)addr;
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/* Write auto select command sequence */
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addr[FLASH_CYCLE1] = 0x00AA; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE2] = 0x0055; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE1] = 0x0090; /* selects Intel or AMD */
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/* read Manufacturer ID */
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udelay(100);
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value = addr[0];
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debug ("Manufacturer ID: %04X\n", value);
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switch (value) {
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case (AMD_MANUFACT & 0xFFFF):
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debug ("Manufacturer: AMD (Spansion)\n");
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info->flash_id = FLASH_MAN_AMD;
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break;
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case (INTEL_MANUFACT & 0xFFFF):
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debug ("Manufacturer: Intel (not supported yet)\n");
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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printf ("Unknown Manufacturer ID: %04X\n", value);
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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goto out;
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}
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value = addr[1];
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debug ("Device ID: %04X\n", value);
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switch (addr[1]) {
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case (AMD_ID_MIRROR & 0xFFFF):
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debug ("Mirror Bit flash: addr[14] = %08X addr[15] = %08X\n",
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addr[14], addr[15]);
|
||||
|
||||
switch(addr[14]) {
|
||||
case (AMD_ID_GL064M_2 & 0xFFFF):
|
||||
if (addr[15] != (AMD_ID_GL064M_3 & 0xffff)) {
|
||||
printf ("Chip: S29GLxxxM -> unknown\n");
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
info->sector_count = 0;
|
||||
info->size = 0;
|
||||
} else {
|
||||
debug ("Chip: S29GL064M-R6\n");
|
||||
info->flash_id += FLASH_S29GL064M;
|
||||
info->sector_count = 128;
|
||||
info->size = 0x00800000;
|
||||
for (i = 0; i < info->sector_count; i++) {
|
||||
info->start[i] = base;
|
||||
base += 0x10000;
|
||||
}
|
||||
}
|
||||
break; /* => 16 MB */
|
||||
default:
|
||||
printf ("Chip: *** unknown ***\n");
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
info->sector_count = 0;
|
||||
info->size = 0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
printf ("Unknown Device ID: %04X\n", value);
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
info->sector_count = 0;
|
||||
info->size = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
out:
|
||||
/* Put FLASH back in read mode */
|
||||
flash_reset(info);
|
||||
|
||||
return (info->size);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
int flash_erase (flash_info_t *info, int s_first, int s_last)
|
||||
{
|
||||
vu_short *addr = (vu_short *)(info->start[0]);
|
||||
int flag, prot, sect, ssect, l_sect;
|
||||
ulong now, last, start;
|
||||
|
||||
debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
|
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) {
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
printf ("- missing\n");
|
||||
} else {
|
||||
printf ("- no sectors to erase\n");
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
if ((info->flash_id == FLASH_UNKNOWN) ||
|
||||
(info->flash_id > FLASH_AMD_COMP)) {
|
||||
printf ("Can't erase unknown flash type %08lx - aborted\n",
|
||||
info->flash_id);
|
||||
return 1;
|
||||
}
|
||||
|
||||
prot = 0;
|
||||
for (sect=s_first; sect<=s_last; ++sect) {
|
||||
if (info->protect[sect]) {
|
||||
prot++;
|
||||
}
|
||||
}
|
||||
|
||||
if (prot) {
|
||||
printf ("- Warning: %d protected sectors will not be erased!\n",
|
||||
prot);
|
||||
} else {
|
||||
printf ("\n");
|
||||
}
|
||||
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts();
|
||||
|
||||
/*
|
||||
* Start erase on unprotected sectors.
|
||||
* Since the flash can erase multiple sectors with one command
|
||||
* we take advantage of that by doing the erase in chunks of
|
||||
* 3 sectors.
|
||||
*/
|
||||
for (sect = s_first; sect <= s_last; ) {
|
||||
l_sect = -1;
|
||||
|
||||
addr[FLASH_CYCLE1] = 0x00AA;
|
||||
addr[FLASH_CYCLE2] = 0x0055;
|
||||
addr[FLASH_CYCLE1] = 0x0080;
|
||||
addr[FLASH_CYCLE1] = 0x00AA;
|
||||
addr[FLASH_CYCLE2] = 0x0055;
|
||||
|
||||
/* do the erase in chunks of at most 3 sectors */
|
||||
for (ssect = 0; ssect < 3; ssect++) {
|
||||
if ((sect + ssect) > s_last)
|
||||
break;
|
||||
if (info->protect[sect + ssect] == 0) { /* not protected */
|
||||
addr = (vu_short *)(info->start[sect + ssect]);
|
||||
addr[0] = 0x0030;
|
||||
l_sect = sect + ssect;
|
||||
}
|
||||
}
|
||||
/* wait at least 80us - let's wait 1 ms */
|
||||
udelay (1000);
|
||||
|
||||
/*
|
||||
* We wait for the last triggered sector
|
||||
*/
|
||||
if (l_sect < 0)
|
||||
goto DONE;
|
||||
|
||||
start = get_timer(0);
|
||||
last = 0;
|
||||
addr = (vu_short *)(info->start[l_sect]);
|
||||
while ((addr[0] & 0x0080) != 0x0080) {
|
||||
if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
|
||||
printf ("Timeout\n");
|
||||
return 1;
|
||||
}
|
||||
/* show that we're waiting */
|
||||
if ((now - last) > 1000) { /* every second */
|
||||
putc ('.');
|
||||
last = now;
|
||||
}
|
||||
}
|
||||
addr = (vu_short *)info->start[0];
|
||||
addr[0] = 0x00F0; /* reset bank */
|
||||
sect += ssect;
|
||||
}
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag)
|
||||
enable_interrupts();
|
||||
|
||||
DONE:
|
||||
/* reset to read mode */
|
||||
addr = (vu_short *)info->start[0];
|
||||
addr[0] = 0x00F0; /* reset bank */
|
||||
|
||||
printf (" done\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
|
||||
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong wp, data;
|
||||
int rc;
|
||||
|
||||
if (addr & 1) {
|
||||
printf ("unaligned destination not supported\n");
|
||||
return ERR_ALIGN;
|
||||
};
|
||||
|
||||
if ((int) src & 1) {
|
||||
printf ("unaligned source not supported\n");
|
||||
return ERR_ALIGN;
|
||||
};
|
||||
|
||||
wp = addr;
|
||||
|
||||
while (cnt >= 2) {
|
||||
data = *((vu_short *)src);
|
||||
if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) {
|
||||
printf ("write_buff 1: write_word_amd() rc=%d\n", rc);
|
||||
return (rc);
|
||||
}
|
||||
src += 2;
|
||||
wp += 2;
|
||||
cnt -= 2;
|
||||
}
|
||||
|
||||
if (cnt == 0) {
|
||||
return (ERR_OK);
|
||||
}
|
||||
|
||||
if (cnt == 1) {
|
||||
data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) << 8);
|
||||
if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) {
|
||||
printf ("write_buff 1: write_word_amd() rc=%d\n", rc);
|
||||
return (rc);
|
||||
}
|
||||
src += 1;
|
||||
wp += 1;
|
||||
cnt -= 1;
|
||||
}
|
||||
|
||||
return ERR_OK;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash for AMD FLASH
|
||||
* A word is 16 or 32 bits, whichever the bus width of the flash bank
|
||||
* (not an individual chip) is.
|
||||
*
|
||||
* returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
static int write_word_amd (flash_info_t *info, vu_short *dest, ushort data)
|
||||
{
|
||||
int flag;
|
||||
vu_short *base; /* first address in flash bank */
|
||||
ulong start;
|
||||
|
||||
/* Check if Flash is (sufficiently) erased */
|
||||
if ((*dest & data) != data) {
|
||||
return (2);
|
||||
}
|
||||
|
||||
base = (vu_short *)(info->start[0]);
|
||||
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts();
|
||||
|
||||
base[FLASH_CYCLE1] = 0x00AA; /* unlock */
|
||||
base[FLASH_CYCLE2] = 0x0055; /* unlock */
|
||||
base[FLASH_CYCLE1] = 0x00A0; /* selects program mode */
|
||||
|
||||
*dest = data; /* start programming the data */
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag)
|
||||
enable_interrupts();
|
||||
|
||||
start = get_timer(0);
|
||||
|
||||
/* data polling for D7 */
|
||||
while ((*dest & 0x0080) != (data & 0x0080)) {
|
||||
if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
|
||||
*dest = 0x00F0; /* reset bank */
|
||||
return (1);
|
||||
}
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
@ -1,113 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2000, 2001, 2002
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* (C) Copyright 2005
|
||||
* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/* #define DEBUG */
|
||||
|
||||
#include <common.h>
|
||||
#include <net.h>
|
||||
|
||||
#define I2C_CHIP 0x50 /* I2C bus address of onboard EEPROM */
|
||||
#define I2C_ALEN 1 /* length of EEPROM addresses in bytes */
|
||||
#define I2C_OFFSET 0x0 /* start address of manufacturere data block
|
||||
* in EEPROM */
|
||||
|
||||
/* 64 Byte manufacturer data block in EEPROM */
|
||||
struct manufacturer_data {
|
||||
unsigned int serial_number; /* serial number (0...999999) */
|
||||
unsigned short hardware; /* hardware version (e.g. V1.02) */
|
||||
unsigned short manuf_date; /* manufacture date (e.g. 25/02) */
|
||||
unsigned char name[20]; /* device name (in CHIP.INI) */
|
||||
unsigned char macadr[6]; /* MAC address */
|
||||
signed char a_kal[4]; /* calibration value for U */
|
||||
signed char i_kal[4]; /* calibration value for I */
|
||||
unsigned char reserve[18]; /* reserved */
|
||||
unsigned short save_nr; /* save count */
|
||||
unsigned short chksum; /* checksum */
|
||||
};
|
||||
|
||||
|
||||
int i2c_read (unsigned char chip, unsigned int addr, int alen,
|
||||
unsigned char *buffer, int len);
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Process manufacturer data block in EEPROM:
|
||||
*
|
||||
* If we boot on a system fresh from factory, check if the manufacturer data
|
||||
* in the EEPROM is valid and save some information it contains.
|
||||
*
|
||||
* CMC manufacturer data is defined as follows:
|
||||
*
|
||||
* - located in the onboard EEPROM
|
||||
* - starts at offset 0x0
|
||||
* - size 0x00000040
|
||||
*
|
||||
* Internal structure: see struct definition
|
||||
*/
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
struct manufacturer_data data;
|
||||
char serial [9];
|
||||
unsigned short chksum;
|
||||
unsigned char *p;
|
||||
unsigned short i;
|
||||
|
||||
#if !defined(CONFIG_HARD_I2C) && !defined(CONFIG_SOFT_I2C)
|
||||
#error you must define some I2C support (CONFIG_HARD_I2C or CONFIG_SOFT_I2C)
|
||||
#endif
|
||||
if (i2c_read(I2C_CHIP, I2C_OFFSET, I2C_ALEN, (unsigned char *)&data,
|
||||
sizeof(data)) != 0) {
|
||||
puts ("Error reading manufacturer data from EEPROM\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* check if manufacturer data block is valid */
|
||||
p = (unsigned char *)&data;
|
||||
chksum = 0;
|
||||
for (i = 0; i < (sizeof(data) - sizeof(data.chksum)); i++)
|
||||
chksum += *p++;
|
||||
|
||||
debug ("checksum of manufacturer data block: %#.4x\n", chksum);
|
||||
|
||||
if (chksum != data.chksum) {
|
||||
puts ("Error: manufacturer data block has invalid checksum\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* copy serial number */
|
||||
sprintf (serial, "%d", data.serial_number);
|
||||
|
||||
/* set serial# and ethaddr if not yet defined */
|
||||
if (getenv("serial#") == NULL) {
|
||||
setenv ("serial#", serial);
|
||||
}
|
||||
|
||||
if (getenv("ethaddr") == NULL) {
|
||||
eth_setenv_enetaddr("ethaddr", data.macadr);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -57,7 +57,6 @@ at91rm9200ek_ram arm arm920t at91rm9200ek atmel
|
||||
eb_cpux9k2 arm arm920t - BuS at91
|
||||
cpuat91 arm arm920t cpuat91 eukrea at91 cpuat91
|
||||
cpuat91_ram arm arm920t cpuat91 eukrea at91 cpuat91:RAMBOOT
|
||||
cmc_pu2 arm arm920t - - at91rm9200
|
||||
csb637 arm arm920t - - at91rm9200
|
||||
kb9202 arm arm920t - - at91rm9200
|
||||
m501sk arm arm920t - - at91rm9200
|
||||
|
||||
@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
|
||||
|
||||
Board Arch CPU removed Commit last known maintainer/contact
|
||||
=============================================================================
|
||||
cmc_pu2 arm arm920t - 2011-07-17
|
||||
at91cap9adk arm arm926ejs - 2011-07-17 Stelian Pop <stelian.pop@leadtechdesign.com>
|
||||
voiceblue arm arm925t - 2011-07-17
|
||||
smdk2400 arm arm920t - 2011-07-17 Gary Jennejohn <garyj@denx.de>
|
||||
|
||||
@ -1,238 +0,0 @@
|
||||
/*
|
||||
* 2004-2005 Gary Jennejohn <garyj@denx.de>
|
||||
*
|
||||
* Configuration settings for the CMC PU2 board.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_AT91_LEGACY
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
|
||||
#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK/3) /* peripheral clock */
|
||||
|
||||
#define AT91_SLOW_CLOCK 32768 /* slow clock */
|
||||
|
||||
#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
|
||||
#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
|
||||
#define CONFIG_CMC_PU2 1 /* on an CMC_PU2 Board */
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
#define USE_920T_MMU 1
|
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
|
||||
/* flash */
|
||||
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
|
||||
#define CONFIG_SYS_SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */
|
||||
|
||||
/* clocks */
|
||||
#define CONFIG_SYS_PLLAR_VAL 0x2026BE04 /* 179,712 MHz for PCK */
|
||||
#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
|
||||
#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 69.120MHz from PLLA */
|
||||
|
||||
/* sdram */
|
||||
#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
|
||||
#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
|
||||
#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
|
||||
#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRC_CR_VAL 0x3399c1d4 /* set up the CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
|
||||
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
||||
|
||||
#define CONFIG_BAUDRATE 9600
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
|
||||
/* define one of these to choose the DBGU, USART0 or USART1 as console */
|
||||
#define CONFIG_AT91RM9200_USART
|
||||
#undef CONFIG_DBGU
|
||||
#define CONFIG_USART0
|
||||
#undef CONFIG_USART1
|
||||
|
||||
#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
|
||||
|
||||
#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
|
||||
|
||||
#define CONFIG_HARD_I2C
|
||||
|
||||
#ifdef CONFIG_HARD_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 0 /* not used */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
|
||||
#define CONFIG_RTC_RS5C372A /* RICOH I2C RTC */
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x32
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
|
||||
#else
|
||||
#define CONFIG_TIMESTAMP
|
||||
#endif
|
||||
/* still about 20 kB free with this defined */
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
|
||||
#define CONFIG_BOOTDELAY 1
|
||||
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_NFS
|
||||
#define CONFIG_CMD_SNTP
|
||||
|
||||
#undef CONFIG_CMD_FPGA
|
||||
#undef CONFIG_CMD_MISC
|
||||
|
||||
#if defined(CONFIG_HARD_I2C)
|
||||
#define CONFIG_CMD_DATE
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_I2C
|
||||
#endif
|
||||
|
||||
|
||||
#define CONFIG_MISC_INIT_R
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
|
||||
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
|
||||
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM 0x20000000
|
||||
#define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
|
||||
#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
|
||||
|
||||
#define CONFIG_NET_MULTI 1
|
||||
#ifdef CONFIG_NET_MULTI
|
||||
#define CONFIG_DRIVER_AT91EMAC 1
|
||||
#define CONFIG_SYS_RX_ETH_BUFFER 8
|
||||
#else
|
||||
#define CONFIG_DRIVER_ETHER 1
|
||||
#endif
|
||||
#define CONFIG_NET_RETRY_COUNT 20
|
||||
#define CONFIG_AT91C_USE_RMII
|
||||
|
||||
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
|
||||
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
|
||||
#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
|
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
|
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
|
||||
|
||||
#define PHYS_FLASH_1 0x10000000
|
||||
#define PHYS_FLASH_SIZE 0x800000 /* 8 megs main flash */
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 256
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (11 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT ( 2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
|
||||
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_OFFSET 0x20000 /* after u-boot.bin */
|
||||
#define CONFIG_ENV_SECT_SIZE (64 << 10) /* sectors are 64 kB */
|
||||
#define CONFIG_ENV_SIZE (16 << 10) /* Use only 16 kB */
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
|
||||
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
|
||||
|
||||
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
||||
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */
|
||||
/* AT91C_TC_TIMER_DIV1_CLOCK */
|
||||
|
||||
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#error CONFIG_USE_IRQ not supported
|
||||
#endif
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"net_nfs=tftp ${loadaddr} ${bootfile};run nfsargs addip addcons " \
|
||||
"addmtd;bootm\0" \
|
||||
"nfsargs=setenv bootargs root=/dev/nfs rw " \
|
||||
"nfsroot=${serverip}:${rootpath}\0" \
|
||||
"net_cramfs=tftp ${loadaddr} ${bootfile}; run flashargs addip " \
|
||||
"addcons addmtd; bootm\0" \
|
||||
"flash_cramfs=run flashargs addip addcons addmtd; bootm 10030000\0" \
|
||||
"flashargs=setenv bootargs root=/dev/mtdblock3 ro\0" \
|
||||
"addip=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
|
||||
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \
|
||||
"${hostname}::off\0" \
|
||||
"addcons=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
|
||||
"addmtd=setenv bootargs ${bootargs} mtdparts=cmc_pu2:128k(uboot)ro," \
|
||||
"64k(environment),768k(linux),4096k(root),-\0" \
|
||||
"load=tftp ${loadaddr} ${loadfile}\0" \
|
||||
"update=protect off 10000000 1001ffff;erase 10000000 1001ffff; " \
|
||||
"cp.b ${loadaddr} 10000000 ${filesize};" \
|
||||
"protect on 10000000 1001ffff\0" \
|
||||
"updatel=era 10030000 100effff;tftp ${loadaddr} ${bootfile}; " \
|
||||
"cp.b ${loadaddr} 10030000 ${filesize}\0" \
|
||||
"updatec=era 100f0000 104effff;tftp ${loadaddr} ${cramfsimage}; " \
|
||||
"cp.b ${loadaddr} 100f0000 ${filesize}\0" \
|
||||
"updatej=era 104f0000 107fffff;tftp ${loadaddr} ${jffsimage}; " \
|
||||
"cp.b ${loadaddr} 104f0000 ${filesize}\0" \
|
||||
"cramfsimage=cramfs_cmc-pu2.img\0" \
|
||||
"jffsimage=jffs2_cmc-pu2.img\0" \
|
||||
"loadfile=u-boot_cmc-pu2.bin\0" \
|
||||
"bootfile=uImage_cmc-pu2\0" \
|
||||
"loadaddr=0x20800000\0" \
|
||||
"hostname=CMC-TC-PU2\0" \
|
||||
"bootcmd=run dhcp_start;run flash_cramfs\0" \
|
||||
"autoload=n\0" \
|
||||
"dhcp_start=echo no DHCP\0" \
|
||||
"ipaddr=192.168.0.190\0"
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Reference in New Issue
Block a user