* Patch by Mark Jonas, 08 June 2004:
- Make MPC5200 boards evaluate the SVR to print processor name and version in checkcpu() (cpu/mpc5xxx/cpu.c). * Patch by Kai-Uwe Bloem, 06 May 2004: Fix endianess problem in cramfs code
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@ -2,6 +2,13 @@
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Changes since U-Boot 1.1.1:
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======================================================================
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* Patch by Mark Jonas, 08 June 2004:
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- Make MPC5200 boards evaluate the SVR to print processor name and
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version in checkcpu() (cpu/mpc5xxx/cpu.c).
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* Patch by Kai-Uwe Bloem, 06 May 2004:
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Fix endianess problem in cramfs code
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* Patch by Tom Armistead, 04 Jun 2004:
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Add support for MAX6900 RTC
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@ -37,12 +37,28 @@ int checkcpu (void)
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ulong clock = gd->cpu_clk;
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char buf[32];
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#ifndef CONFIG_MGT5100
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uint svr;
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#endif
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puts ("CPU: ");
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printf (CPU_ID_STR);
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#ifdef CONFIG_MGT5100
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puts (CPU_ID_STR);
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printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
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#else
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svr = get_svr ();
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switch (SVR_VER (svr)) {
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case SVR_MPC5200:
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printf ("MPC5200");
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break;
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default:
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printf ("MPC52?? (SVR %08x)", svr);
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break;
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}
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printf (" v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr));
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#endif
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printf (" at %s MHz\n", strmhz (buf, clock));
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@ -549,6 +549,11 @@ dcache_status:
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rlwinm r3, r3, HID0_DCE_BITPOS + 1, 31, 31
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blr
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.globl get_svr
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get_svr:
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mfspr r3, SVR
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blr
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.globl get_pvr
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get_pvr:
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mfspr r3, PVR
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@ -280,6 +280,7 @@
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#define SPRN_PMC2 0x3BA /* Performance Counter Register 2 */
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#define SPRN_PMC3 0x3BD /* Performance Counter Register 3 */
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#define SPRN_PMC4 0x3BE /* Performance Counter Register 4 */
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#define SPRN_SVR 0x11E /* System-On-Chip Version Register */
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#define SPRN_PVR 0x11F /* Processor Version Register */
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#define SPRN_RPA 0x3D6 /* Required Physical Address Register */
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#define SPRN_SDA 0x3BF /* Sampled Data Address Register */
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@ -496,6 +497,7 @@
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#if defined(CONFIG_E500)
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#define PIR SPRN_PIR
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#endif
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#define SVR SPRN_SVR /* System-On-Chip Version Register */
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#define PVR SPRN_PVR /* Processor Version */
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#define RPA SPRN_RPA /* Required Physical Address Register */
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#define SDR1 SPRN_SDR1 /* MMU hash base register */
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@ -654,6 +656,23 @@
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#define IOCR_SCS 0x00000002
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#define IOCR_SPC 0x00000001
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/* System-On-Chip Version Register */
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/* System-On-Chip Version Register (SVR) field extraction */
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#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */
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#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */
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#define SVR_CID(svr) (((svr) >> 28) & 0x0F) /* Company or manufacturer ID */
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#define SVR_SOCOP(svr) (((svr) >> 22) & 0x3F) /* SOC integration options */
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#define SVR_SID(svr) (((svr) >> 16) & 0x3F) /* SOC ID */
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#define SVR_PROC(svr) (((svr) >> 12) & 0x0F) /* Process revision field */
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#define SVR_MFG(svr) (((svr) >> 8) & 0x0F) /* Manufacturing revision */
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#define SVR_MJREV(svr) (((svr) >> 4) & 0x0F) /* Major SOC design revision indicator */
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#define SVR_MNREV(svr) (((svr) >> 0) & 0x0F) /* Minor SOC design revision indicator */
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/* System-On-Chip Version Numbers (version field only) */
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#define SVR_MPC5200 0x8011
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/* Processor Version Register */
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@ -315,6 +315,9 @@ int testdram(void);
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uint get_immr (uint);
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#endif
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uint get_pir (void);
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#if defined(CONFIG_MPC5xxx)
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uint get_svr (void);
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#endif
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uint get_pvr (void);
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uint get_svr (void);
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uint rd_ic_cst (void);
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@ -84,21 +84,6 @@ struct cramfs_super {
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| CRAMFS_FLAG_WRONG_SIGNATURE \
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| CRAMFS_FLAG_SHIFTED_ROOT_OFFSET )
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/*
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* Since cramfs is little-endian, provide macros to swab the bitfields.
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*/
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#ifndef __BYTE_ORDER
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#if defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN)
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#define __BYTE_ORDER __LITTLE_ENDIAN
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#elif defined(__BIG_ENDIAN) && !defined(__LITTLE_ENDIAN)
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#define __BYTE_ORDER __BIG_ENDIAN
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#else
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#error "unable to define __BYTE_ORDER"
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#endif
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#endif /* not __BYTE_ORDER */
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#if __BYTE_ORDER == __LITTLE_ENDIAN
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#define CRAMFS_16(x) (x)
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#define CRAMFS_24(x) (x)
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#define CRAMFS_32(x) (x)
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@ -106,27 +91,6 @@ struct cramfs_super {
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#define CRAMFS_GET_OFFSET(x) ((x)->offset)
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#define CRAMFS_SET_OFFSET(x,y) ((x)->offset = (y))
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#define CRAMFS_SET_NAMELEN(x,y) ((x)->namelen = (y))
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#elif __BYTE_ORDER == __BIG_ENDIAN
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#ifdef __KERNEL__
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#define CRAMFS_16(x) swab16(x)
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#define CRAMFS_24(x) ((swab32(x)) >> 8)
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#define CRAMFS_32(x) swab32(x)
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#else /* not __KERNEL__ */
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#define CRAMFS_16(x) bswap_16(x)
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#define CRAMFS_24(x) ((bswap_32(x)) >> 8)
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#define CRAMFS_32(x) bswap_32(x)
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#endif /* not __KERNEL__ */
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#define CRAMFS_GET_NAMELEN(x) (((u8*)(x))[8] & 0x3f)
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#define CRAMFS_GET_OFFSET(x) ((CRAMFS_24(((u32*)(x))[2] & 0xffffff) << 2) |\
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((((u32*)(x))[2] & 0xc0000000) >> 30))
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#define CRAMFS_SET_NAMELEN(x,y) (((u8*)(x))[8] = (((0x3f & (y))) | \
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(0xc0 & ((u8*)(x))[8])))
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#define CRAMFS_SET_OFFSET(x,y) (((u32*)(x))[2] = (((y) & 3) << 30) | \
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CRAMFS_24((((y) & 0x03ffffff) >> 2)) | \
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(((u32)(((u8*)(x))[8] & 0x3f)) << 24))
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#else
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#error "__BYTE_ORDER must be __LITTLE_ENDIAN or __BIG_ENDIAN"
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#endif
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/* Uncompression interfaces to the underlying zlib */
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int cramfs_uncompress_block(void *dst, void *src, int srclen);
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