arm64: zynqmp: Enable SPD ddr support for zcu102 targets
zcu102 contains DIMM with SPD on it at 0x51 address. For example: i2c dev 13 i2c sdram 51 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -35,6 +35,7 @@ CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SDRAM=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_TIME=y
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@ -34,6 +34,7 @@ CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SDRAM=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_TIME=y
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@ -34,6 +34,7 @@ CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SDRAM=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_TIME=y
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@ -39,6 +39,9 @@
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#define CONFIG_ZYNQ_EEPROM_BUS 5
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#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
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#define CONFIG_SPD_EEPROM
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#define CONFIG_DDR_SPD
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#include <configs/xilinx_zynqmp.h>
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#endif /* __CONFIG_ZYNQMP_ZCU102_H */
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