clk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clock
After commit 673f659732
("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF need
to provide PTP clock.
On the i.MX6Q this clock is provided with IMX6QDL_CLK_ENET_REF in the Linux
kernel's CCF.
Code in this change models the simplest case when enet reference clock is
generated from 'osc' clock.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit is contained in:
parent
8d540ccb11
commit
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@ -113,6 +113,10 @@ static int imx6q_clk_probe(struct udevice *dev)
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imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0));
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clk_dm(IMX6QDL_CLK_PLL2_PFD2_396M,
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imx_clk_pfd("pll2_pfd2_396m", "pll2_bus", base + 0x100, 2));
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clk_dm(IMX6QDL_CLK_PLL6,
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imx_clk_pllv3(IMX_PLLV3_ENET, "pll6", "osc", base + 0xe0, 0x3));
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clk_dm(IMX6QDL_CLK_PLL6_ENET,
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imx_clk_gate("pll6_enet", "pll6", base + 0xe0, 13));
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/* CCM clocks */
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base = dev_read_addr_ptr(dev);
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@ -184,6 +188,9 @@ static int imx6q_clk_probe(struct udevice *dev)
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imx_clk_gate2("i2c2", "ipg_per", base + 0x70, 8));
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clk_dm(IMX6QDL_CLK_ENET, imx_clk_gate2("enet", "ipg", base + 0x6c, 10));
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clk_dm(IMX6QDL_CLK_ENET_REF,
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imx_clk_fixed_factor("enet_ref", "pll6_enet", 1, 1));
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return 0;
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}
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