powerpc/mpc85xx: add support for MMUv2 page sizes
e6500 implements MMUv2 and supports power-of-2 page sizes rather than power-of-4. Add support for such pages. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Scott Wood
Andy Fleming
parent
41d910118c
commit
31d084ddda
@ -449,7 +449,7 @@ nexti: mflr r1 /* R1 = our PC */
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/* Set the size of the TLB to 4KB */
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mfspr r3, MAS1
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li r2, 0xF00
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li r2, 0xF80
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andc r3, r3, r2 /* Clear the TSIZE bits */
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ori r3, r3, MAS1_TSIZE(BOOKE_PAGESZ_4K)@l
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oris r3, r3, MAS1_IPROT@h
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@ -66,7 +66,7 @@ void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
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_mas1 = mfspr(MAS1);
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*valid = (_mas1 & MAS1_VALID);
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*tsize = (_mas1 >> 8) & 0xf;
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*tsize = (_mas1 >> 7) & 0x1f;
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*epn = mfspr(MAS2) & MAS2_EPN;
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*rpn = mfspr(MAS3) & MAS3_RPN;
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#ifdef CONFIG_ENABLE_36BIT_PHYS
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@ -156,6 +156,13 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn,
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if (tlb == 1)
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use_tlb_cam(esel);
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if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 &&
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tsize & 1) {
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printf("%s: bad tsize %d on entry %d at 0x%08x\n",
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__func__, tsize, tlb, epn);
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return;
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}
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_mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
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_mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
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_mas2 = FSL_BOOKE_MAS2(epn, wimge);
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@ -251,7 +258,7 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
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unsigned int tlb_size;
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unsigned int wimge = MAS2_M;
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unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
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unsigned int max_cam;
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unsigned int max_cam, tsize_mask;
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u64 size, memsize = (u64)memsize_in_meg << 20;
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#ifdef CONFIG_SYS_PPC_DDR_WIMGE
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@ -261,15 +268,17 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
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if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
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/* Convert (4^max) kB to (2^max) bytes */
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max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
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tsize_mask = ~1U;
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} else {
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/* Convert (2^max) kB to (2^max) bytes */
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max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
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tsize_mask = ~0U;
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}
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for (i = 0; size && i < 8; i++) {
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int ram_tlb_index = find_free_tlbcam();
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u32 camsize = __ilog2_u64(size) & ~1U;
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u32 align = __ilog2(ram_tlb_address) & ~1U;
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u32 camsize = __ilog2_u64(size) & tsize_mask;
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u32 align = __ilog2(ram_tlb_address) & tsize_mask;
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if (ram_tlb_index == -1)
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break;
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@ -281,7 +290,7 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
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if (camsize > max_cam)
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camsize = max_cam;
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tlb_size = (camsize - 10) / 2;
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tlb_size = camsize - 10;
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set_tlb(1, ram_tlb_address, p_addr,
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MAS3_SX|MAS3_SW|MAS3_SR, wimge,
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@ -401,8 +401,8 @@ extern void print_bats(void);
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#define MAS1_IPROT 0x40000000
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#define MAS1_TID(x) (((x) << 16) & 0x3FFF0000)
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#define MAS1_TS 0x00001000
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#define MAS1_TSIZE(x) (((x) << 8) & 0x00000F00)
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#define TSIZE_TO_BYTES(x) (1ULL << (((x) * 2) + 10))
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#define MAS1_TSIZE(x) (((x) << 7) & 0x00000F80)
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#define TSIZE_TO_BYTES(x) (1ULL << ((x) + 10))
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#define MAS2_EPN 0xFFFFF000
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#define MAS2_X0 0x00000040
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@ -458,22 +458,38 @@ extern void print_bats(void);
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#define FSL_BOOKE_MAS7(rpn) \
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(((u64)(rpn)) >> 32)
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#define BOOKE_PAGESZ_1K 0
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#define BOOKE_PAGESZ_4K 1
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#define BOOKE_PAGESZ_16K 2
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#define BOOKE_PAGESZ_64K 3
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#define BOOKE_PAGESZ_256K 4
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#define BOOKE_PAGESZ_1M 5
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#define BOOKE_PAGESZ_4M 6
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#define BOOKE_PAGESZ_16M 7
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#define BOOKE_PAGESZ_64M 8
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#define BOOKE_PAGESZ_256M 9
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#define BOOKE_PAGESZ_1G 10
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#define BOOKE_PAGESZ_4G 11
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#define BOOKE_PAGESZ_16GB 12
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#define BOOKE_PAGESZ_64GB 13
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#define BOOKE_PAGESZ_256GB 14
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#define BOOKE_PAGESZ_1TB 15
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#define BOOKE_PAGESZ_1K 0
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#define BOOKE_PAGESZ_2K 1
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#define BOOKE_PAGESZ_4K 2
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#define BOOKE_PAGESZ_8K 3
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#define BOOKE_PAGESZ_16K 4
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#define BOOKE_PAGESZ_32K 5
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#define BOOKE_PAGESZ_64K 6
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#define BOOKE_PAGESZ_128K 7
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#define BOOKE_PAGESZ_256K 8
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#define BOOKE_PAGESZ_512K 9
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#define BOOKE_PAGESZ_1M 10
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#define BOOKE_PAGESZ_2M 11
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#define BOOKE_PAGESZ_4M 12
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#define BOOKE_PAGESZ_8M 13
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#define BOOKE_PAGESZ_16M 14
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#define BOOKE_PAGESZ_32M 15
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#define BOOKE_PAGESZ_64M 16
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#define BOOKE_PAGESZ_128M 17
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#define BOOKE_PAGESZ_256M 18
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#define BOOKE_PAGESZ_512M 19
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#define BOOKE_PAGESZ_1G 20
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#define BOOKE_PAGESZ_2G 21
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#define BOOKE_PAGESZ_4G 22
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#define BOOKE_PAGESZ_8G 23
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#define BOOKE_PAGESZ_16GB 24
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#define BOOKE_PAGESZ_32GB 25
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#define BOOKE_PAGESZ_64GB 26
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#define BOOKE_PAGESZ_128GB 27
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#define BOOKE_PAGESZ_256GB 28
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#define BOOKE_PAGESZ_512GB 29
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#define BOOKE_PAGESZ_1TB 30
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#define BOOKE_PAGESZ_2TB 31
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#define TLBIVAX_ALL 4
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#define TLBIVAX_TLB0 0
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