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ARM: tegra: add DWC EQoS (ethernet) to Tegra186 DT

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Tegra186 includes a Synopsys DWC EQoS (Ethernet) device. Add this to the
Tegra186 SoC DT so that boards can make use of it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Stephen Warren 2016-09-12 11:51:14 -06:00 committed by Joe Hershberger
parent 2b950f3aea
commit 31c1ff90e2
1 changed files with 20 additions and 0 deletions
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20
arch/arm/dts/tegra186.dtsi
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@ -31,6 +31,26 @@
#interrupt-cells = <2>;
};
ethernet@2490000 {
compatible = "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10";
reg = <0x0 0x02490000 0x0 0x10000>;
interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_AXI_CBB>,
<&bpmp TEGRA186_CLK_EQOS_AXI>,
<&bpmp TEGRA186_CLK_EQOS_RX>,
<&bpmp TEGRA186_CLK_EQOS_PTP_REF>,
<&bpmp TEGRA186_CLK_EQOS_TX>;
clock-names = "slave_bus",
"master_bus",
"rx",
"ptp_ref",
"tx";
resets = <&bpmp TEGRA186_RESET_EQOS>;
reset-names = "eqos";
phy-mode = "rgmii";
status = "disabled";
};
uarta: serial@3100000 {
compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
reg = <0x0 0x03100000 0x0 0x10000>;