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riscv: Consolidate fences into AMOs for available_harts_lock

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We can reduce the number of instructions needed to use available_harts_lock
by using the aq and rl suffixes for AMOs.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
This commit is contained in:
Sean Anderson 2020-09-21 07:51:39 -04:00 committed by Andes
parent 768502e2a7
commit 309995b315
1 changed files with 3 additions and 6 deletions
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9
arch/riscv/cpu/start.S
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@ -125,14 +125,12 @@ call_board_init_f_0:
#ifndef CONFIG_XIP
la t0, available_harts_lock
fence rw, w
amoswap.w zero, zero, 0(t0)
amoswap.w.rl zero, zero, 0(t0)
wait_for_gd_init:
la t0, available_harts_lock
li t1, 1
1: amoswap.w t1, t1, 0(t0)
fence r, rw
1: amoswap.w.aq t1, t1, 0(t0)
bnez t1, 1b
/* register available harts in the available_harts mask */
@ -142,8 +140,7 @@ wait_for_gd_init:
or t2, t2, t1
SREG t2, GD_AVAILABLE_HARTS(gp)
fence rw, w
amoswap.w zero, zero, 0(t0)
amoswap.w.rl zero, zero, 0(t0)
/*
* Continue on hart lottery winner, others branch to