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Merge branch 'Makefile' of git://git.denx.de/u-boot-arm

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This commit is contained in:
Wolfgang Denk 2008-08-13 23:23:13 +02:00
commit 2fd0aad443
307 changed files with 333 additions and 571 deletions
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2
Makefile
View File

@ -2695,7 +2695,7 @@ imx31_phycore_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 imx31_phycore NULL mx31
mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
omap2420h4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx

2
README
View File

@ -2064,7 +2064,7 @@ Configuration Settings:
Define if the flash driver uses extra elements in the
common flash structure for storing flash geometry.
- CFG_FLASH_CFI_DRIVER
- CONFIG_FLASH_CFI_DRIVER
This option also enables the building of the cfi_flash driver
in the drivers directory

2
board/delta/nand.c
View File

@ -23,7 +23,7 @@
#include <common.h>
#if defined(CONFIG_CMD_NAND)
#if !defined(CFG_NAND_LEGACY)
#if !defined(CONFIG_NAND_LEGACY)
#include <nand.h>
#include <asm/arch/pxa-regs.h>

12
board/esd/common/auto_update.c
View File

@ -27,7 +27,7 @@
#include <command.h>
#include <image.h>
#include <asm/byteorder.h>
#if defined(CFG_NAND_LEGACY)
#if defined(CONFIG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#endif
#include <fat.h>
@ -58,7 +58,7 @@ extern int flash_sect_erase(ulong, ulong);
extern int flash_sect_protect (int, ulong, ulong);
extern int flash_write (char *, ulong, ulong);
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
/* references to names in cmd_nand.c */
#define NANDRW_READ 0x01
#define NANDRW_WRITE 0x00
@ -158,7 +158,7 @@ int au_do_update(int i, long sz)
int off, rc;
uint nbytes;
int k;
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
int total;
#endif
@ -241,7 +241,7 @@ int au_do_update(int i, long sz)
debug ("flash_sect_erase(%lx, %lx);\n", start, end);
flash_sect_erase (start, end);
} else {
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
printf ("Updating NAND FLASH with image %s\n",
au_image[i].name);
debug ("nand_legacy_erase(%lx, %lx);\n", start, end);
@ -273,7 +273,7 @@ int au_do_update(int i, long sz)
rc = flash_write ((char *)addr, start,
(nbytes + 1) & ~1);
} else {
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
debug ("nand_legacy_rw(%p, %lx, %x)\n",
addr, start, nbytes);
rc = nand_legacy_rw (nand_dev_desc,
@ -298,7 +298,7 @@ int au_do_update(int i, long sz)
rc = crc32 (0, (uchar *)(start + off),
image_get_data_size (hdr));
} else {
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
rc = nand_legacy_rw (nand_dev_desc,
NANDRW_READ | NANDRW_JFFS2 |
NANDRW_JFFS2_SKIP,

0
board/mx31ads/Makefile → board/freescale/mx31ads/Makefile
View File

0
board/mx31ads/config.mk → board/freescale/mx31ads/config.mk
View File

0
board/mx31ads/lowlevel_init.S → board/freescale/mx31ads/lowlevel_init.S
View File

0
board/mx31ads/mx31ads.c → board/freescale/mx31ads/mx31ads.c
View File

10
board/mx31ads/u-boot.lds → board/freescale/mx31ads/u-boot.lds
View File

@ -37,11 +37,11 @@ SECTIONS
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/arm1136/start.o (.text)
board/mx31ads/libmx31ads.a (.text)
lib_arm/libarm.a (.text)
net/libnet.a (.text)
drivers/mtd/libmtd.a (.text)
cpu/arm1136/start.o (.text)
board/freescale/mx31ads/libmx31ads.a (.text)
lib_arm/libarm.a (.text)
net/libnet.a (.text)
drivers/mtd/libmtd.a (.text)
. = DEFINED(env_offset) ? env_offset : .;
common/environment.o(.text)

4
board/icecube/flash.c
View File

@ -23,7 +23,7 @@
#include <common.h>
#ifndef CFG_FLASH_CFI_DRIVER
#ifndef CONFIG_FLASH_CFI_DRIVER
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
/* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
@ -490,4 +490,4 @@ static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
return (res);
}
#endif /*CFG_FLASH_CFI_DRIVER*/
#endif /*CONFIG_FLASH_CFI_DRIVER*/

2
board/netta/netta.c
View File

@ -555,7 +555,7 @@ int board_early_init_f(void)
return 0;
}
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>

4
board/prodrive/pdnb3/flash.c
View File

@ -24,7 +24,7 @@
#include <common.h>
#include <asm/arch/ixp425.h>
#if !defined(CFG_FLASH_CFI_DRIVER)
#if !defined(CONFIG_FLASH_CFI_DRIVER)
/*
* include common flash code (for esd boards)
@ -86,4 +86,4 @@ unsigned long flash_init(void)
return size;
}
#endif /* CFG_FLASH_CFI_DRIVER */
#endif /* CONFIG_FLASH_CFI_DRIVER */

4
board/tqc/tqm8xx/flash.c
View File

@ -33,7 +33,7 @@
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CFG_FLASH_CFI_DRIVER) /* do not use if CFI driver is configured */
#if !defined(CONFIG_FLASH_CFI_DRIVER) /* do not use if CFI driver is configured */
#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
&& !defined(CONFIG_TQM885D)
@ -831,4 +831,4 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
/*-----------------------------------------------------------------------
*/
#endif /* !defined(CFG_FLASH_CFI_DRIVER) */
#endif /* !defined(CONFIG_FLASH_CFI_DRIVER) */

4
common/ACEX1K.c
View File

@ -28,8 +28,6 @@
#include <common.h> /* core U-Boot definitions */
#include <ACEX1K.h> /* ACEX device family */
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_ACEX1K)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
@ -362,5 +360,3 @@ static int ACEX1K_ps_reloc (Altera_desc * desc, ulong reloc_offset)
return ret_val;
}
#endif /* CONFIG_FPGA && CONFIG_FPGA_ALTERA && CONFIG_FPGA_ACEX1K */

42
common/Makefile
View File

@ -28,9 +28,7 @@ LIB = $(obj)libcommon.a
AOBJS =
COBJS-y += main.o
COBJS-y += ACEX1K.o
COBJS-y += altera.o
COBJS-y += bedbug.o
COBJS-$(CONFIG_CMD_BEDBUG) += bedbug.o
COBJS-y += circbuf.o
COBJS-$(CONFIG_CMD_AMBAPP) += cmd_ambapp.o
COBJS-y += cmd_autoscript.o
@ -64,7 +62,18 @@ COBJS-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o
COBJS-$(CONFIG_CMD_FDOS) += cmd_fdos.o
COBJS-$(CONFIG_CMD_FLASH) += cmd_flash.o
ifdef CONFIG_FPGA
COBJS-y += fpga.o
COBJS-$(CONFIG_CMD_FPGA) += cmd_fpga.o
COBJS-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
COBJS-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
COBJS-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
COBJS-$(CONFIG_FPGA_XILINX) += xilinx.o
ifdef CONFIG_FPGA_ALTERA
COBJS-y += altera.o
COBJS-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
COBJS-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
COBJS-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
endif
endif
COBJS-$(CONFIG_CMD_I2C) += cmd_i2c.o
COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o
@ -80,7 +89,7 @@ COBJS-$(CONFIG_CMD_MMC) += cmd_mmc.o
COBJS-y += cmd_nand.o
COBJS-$(CONFIG_CMD_NET) += cmd_net.o
COBJS-y += cmd_nvedit.o
COBJS-y += cmd_onenand.o
COBJS-$(CONFIG_CMD_ONENAND) += cmd_onenand.o
COBJS-$(CONFIG_CMD_OTP) += cmd_otp.o
ifdef CONFIG_PCI
COBJS-$(CONFIG_CMD_PCI) += cmd_pci.o
@ -102,11 +111,9 @@ COBJS-$(CONFIG_YAFFS2) += cmd_yaffs2.o
COBJS-y += cmd_vfd.o
COBJS-y += command.o
COBJS-y += console.o
COBJS-y += cyclon2.o
COBJS-y += stratixII.o
COBJS-y += devices.o
COBJS-y += dlmalloc.o
COBJS-y += docecc.o
COBJS-$(CONFIG_CMD_DOC) += docecc.o
COBJS-y += environment.o
COBJS-y += env_common.o
COBJS-y += env_nand.o
@ -119,26 +126,23 @@ COBJS-y += env_nvram.o
COBJS-y += env_nowhere.o
COBJS-y += exports.o
COBJS-y += flash.o
COBJS-y += fpga.o
COBJS-y += hush.o
COBJS-y += kgdb.o
COBJS-y += lcd.o
COBJS-$(CONFIG_LCD) += lcd.o
COBJS-y += lists.o
COBJS-y += lynxkdi.o
COBJS-$(CONFIG_LYNXKDI) += lynxkdi.o
COBJS-y += memsize.o
COBJS-y += miiphybb.o
COBJS-$(CONFIG_BITBANGMII) += miiphybb.o
COBJS-y += miiphyutil.o
COBJS-y += s_record.o
COBJS-y += serial.o
COBJS-y += soft_i2c.o
COBJS-y += soft_spi.o
COBJS-y += spartan2.o
COBJS-y += spartan3.o
COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
ifdef CONFIG_CMD_USB
COBJS-y += usb.o
COBJS-y += usb_kbd.o
COBJS-y += usb_storage.o
COBJS-y += virtex2.o
COBJS-y += xilinx.o
COBJS-$(CONFIG_USB_STORAGE) += usb_storage.o
endif
COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
COBJS-y += crc16.o
COBJS-y += xyzModem.o
COBJS-y += cmd_mac.o

4
common/altera.c
View File

@ -41,8 +41,6 @@
#define PRINTF(fmt,args...)
#endif
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA)
/* Local Static Functions */
static int altera_validate (Altera_desc * desc, const char *fn);
@ -283,5 +281,3 @@ static int altera_validate (Altera_desc * desc, const char *fn)
}
/* ------------------------------------------------------------------------- */
#endif /* CONFIG_FPGA & CONFIG_FPGA_ALTERA */

4
common/bedbug.c
View File

@ -2,8 +2,6 @@
#include <common.h>
#if defined(CONFIG_CMD_BEDBUG)
#include <linux/ctype.h>
#include <bedbug/bedbug.h>
#include <bedbug/ppc.h>
@ -1252,5 +1250,3 @@ int find_next_address (unsigned char *nextaddr, int step_over,
* warranties of merchantability and fitness for a particular
* purpose.
*/
#endif

12
common/cmd_jffs2.c
View File

@ -96,12 +96,12 @@
#include <cramfs/cramfs_fs.h>
#if defined(CONFIG_CMD_NAND)
#ifdef CFG_NAND_LEGACY
#ifdef CONFIG_NAND_LEGACY
#include <linux/mtd/nand_legacy.h>
#else /* !CFG_NAND_LEGACY */
#else /* !CONFIG_NAND_LEGACY */
#include <linux/mtd/nand.h>
#include <nand.h>
#endif /* !CFG_NAND_LEGACY */
#endif /* !CONFIG_NAND_LEGACY */
#endif
/* enable/disable debugging messages */
#define DEBUG_JFFS
@ -476,7 +476,7 @@ static int part_del(struct mtd_device *dev, struct part_info *part)
}
}
#ifdef CFG_NAND_LEGACY
#ifdef CONFIG_NAND_LEGACY
jffs2_free_cache(part);
#endif
list_del(&part->link);
@ -505,7 +505,7 @@ static void part_delall(struct list_head *head)
list_for_each_safe(entry, n, head) {
part_tmp = list_entry(entry, struct part_info, link);
#ifdef CFG_NAND_LEGACY
#ifdef CONFIG_NAND_LEGACY
jffs2_free_cache(part_tmp);
#endif
list_del(entry);
@ -741,7 +741,7 @@ static int device_validate(u8 type, u8 num, u32 *size)
} else if (type == MTD_DEV_TYPE_NAND) {
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
if (num < CFG_MAX_NAND_DEVICE) {
#ifndef CFG_NAND_LEGACY
#ifndef CONFIG_NAND_LEGACY
*size = nand_info[num].size;
#else
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];

6
common/cmd_nand.c
View File

@ -11,7 +11,7 @@
#include <common.h>
#ifndef CFG_NAND_LEGACY
#ifndef CONFIG_NAND_LEGACY
/*
*
* New NAND support
@ -667,7 +667,7 @@ U_BOOT_CMD(nboot, 4, 1, do_nandboot,
#endif
#else /* CFG_NAND_LEGACY */
#else /* CONFIG_NAND_LEGACY */
/*
*
* Legacy NAND support - to be phased out
@ -1077,4 +1077,4 @@ U_BOOT_CMD(
#endif
#endif /* CFG_NAND_LEGACY */
#endif /* CONFIG_NAND_LEGACY */

4
common/cmd_onenand.c
View File

@ -12,8 +12,6 @@
#include <common.h>
#include <command.h>
#ifdef CONFIG_CMD_ONENAND
#include <linux/mtd/compat.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/onenand.h>
@ -159,5 +157,3 @@ U_BOOT_CMD(
"onenand block[.oob] addr block [page] [len] - "
"read data with (block [, page]) to addr"
);
#endif /* CONFIG_CMD_ONENAND */

4
common/cyclon2.c
View File

@ -27,8 +27,6 @@
#include <altera.h>
#include <ACEX1K.h> /* ACEX device family */
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_CYCLON2)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
@ -301,5 +299,3 @@ static int CYC2_ps_reloc (Altera_desc * desc, ulong reloc_offset)
return ret_val;
}
#endif /* CONFIG_FPGA && CONFIG_FPGA_ALTERA && CONFIG_FPGA_CYCLON2 */

4
common/docecc.c
View File

@ -31,8 +31,6 @@
#undef ECC_DEBUG
#undef PSYCHO_DEBUG
#if defined(CONFIG_CMD_DOC)
#include <linux/mtd/doc2000.h>
/* need to undef it (from asm/termbits.h) */
@ -513,5 +511,3 @@ int doc_decode_ecc(unsigned char sector[SECTOR_SIZE], unsigned char ecc1[6])
free(Index_of);
return nb_errors;
}
#endif

4
common/fpga.c
View File

@ -29,8 +29,6 @@
#include <xilinx.h> /* xilinx specific definitions */
#include <altera.h> /* altera specific definitions */
#if defined(CONFIG_FPGA)
#if 0
#define FPGA_DEBUG /* define FPGA_DEBUG to get debug messages */
#endif
@ -335,5 +333,3 @@ int fpga_info( int devnum )
}
/* ------------------------------------------------------------------------- */
#endif /* CONFIG_FPGA */

4
common/lcd.c
View File

@ -55,8 +55,6 @@
#include <nand.h>
#endif
#ifdef CONFIG_LCD
/************************************************************************/
/* ** FONT DATA */
/************************************************************************/
@ -867,5 +865,3 @@ static void *lcd_logo (void)
/************************************************************************/
/************************************************************************/
#endif /* CONFIG_LCD */

3
common/lynxkdi.c
View File

@ -17,7 +17,6 @@
#include <asm/processor.h>
#include <image.h>
#if defined(CONFIG_LYNXKDI)
#include <lynxkdi.h>
DECLARE_GLOBAL_DATA_PTR;
@ -66,5 +65,3 @@ void lynxkdi_boot (image_header_t *hdr)
#else
#error "Lynx KDI support not implemented for configured CPU"
#endif
#endif /* CONFIG_LYNXKDI */

5
common/miiphybb.c
View File

@ -30,9 +30,6 @@
#include <ioports.h>
#include <ppc_asm.tmpl>
#ifdef CONFIG_BITBANGMII
/*****************************************************************************
*
* Utility to send the preamble, address, and register (common to read
@ -236,5 +233,3 @@ int bb_miiphy_write (char *devname, unsigned char addr,
return 0;
}
#endif /* CONFIG_BITBANGMII */

5
common/soft_i2c.c
View File

@ -41,8 +41,6 @@
#endif
#include <i2c.h>
#if defined(CONFIG_SOFT_I2C)
/* #define DEBUG_I2C */
#ifdef DEBUG_I2C
@ -423,6 +421,3 @@ void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
{
i2c_write(i2c_addr, reg, 1, &val, 1);
}
#endif /* CONFIG_SOFT_I2C */

4
common/soft_spi.c
View File

@ -27,8 +27,6 @@
#include <common.h>
#include <spi.h>
#if defined(CONFIG_SOFT_SPI)
#include <malloc.h>
/*-----------------------------------------------------------------------
@ -193,5 +191,3 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
return(0);
}
#endif /* CONFIG_SOFT_SPI */

4
common/spartan2.c
View File

@ -25,8 +25,6 @@
#include <common.h> /* core U-Boot definitions */
#include <spartan2.h> /* Spartan-II device family */
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN2)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
@ -663,5 +661,3 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
return ret_val;
}
#endif

4
common/spartan3.c
View File

@ -30,8 +30,6 @@
#include <common.h> /* core U-Boot definitions */
#include <spartan3.h> /* Spartan-II device family */
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN3)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
@ -668,5 +666,3 @@ static int Spartan3_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
return ret_val;
}
#endif

4
common/stratixII.c
View File

@ -25,8 +25,6 @@
#include <common.h> /* core U-Boot definitions */
#include <altera.h>
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_STRATIX_II)
int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
int isSerial, int isSecure);
int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize);
@ -231,5 +229,3 @@ int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
return FPGA_SUCCESS;
}
#endif /* defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_STRATIX_II) */

4
common/usb.c
View File

@ -50,8 +50,6 @@
#include <linux/ctype.h>
#include <asm/byteorder.h>
#if defined(CONFIG_CMD_USB)
#include <usb.h>
#ifdef CONFIG_4xx
#include <asm/4xx_pci.h>
@ -1247,6 +1245,4 @@ int usb_hub_probe(struct usb_device *dev, int ifnum)
return ret;
}
#endif
/* EOF */

5
common/usb_kbd.c
View File

@ -28,8 +28,6 @@
#include <devices.h>
#include <asm/byteorder.h>
#ifdef CONFIG_USB_KEYBOARD
#include <usb.h>
#undef USB_KBD_DEBUG
@ -746,7 +744,4 @@ static int usb_kbd_get_hid_desc(struct usb_device *dev)
}
#endif
#endif /* CONFIG_USB_KEYBOARD */

7
common/usb_storage.c
View File

@ -55,13 +55,9 @@
#include <asm/byteorder.h>
#include <asm/processor.h>
#if defined(CONFIG_CMD_USB)
#include <part.h>
#include <usb.h>
#ifdef CONFIG_USB_STORAGE
#undef USB_STOR_DEBUG
#undef BBB_COMDAT_TRACE
#undef BBB_XPORT_TRACE
@ -1242,6 +1238,3 @@ int usb_stor_get_info(struct usb_device *dev,struct us_data *ss,block_dev_desc_t
USB_STOR_PRINTF("partype: %d\n",dev_desc->part_type);
return 1;
}
#endif /* CONFIG_USB_STORAGE */
#endif

3
common/virtex2.c
View File

@ -31,8 +31,6 @@
#include <common.h>
#include <virtex2.h>
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_VIRTEX2)
#if 0
#define FPGA_DEBUG
#endif
@ -552,6 +550,5 @@ static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
}
return ret_val;
}
#endif
/* vim: set ts=4 tw=78: */

4
common/xilinx.c
View File

@ -32,8 +32,6 @@
#include <spartan2.h>
#include <spartan3.h>
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX)
#if 0
#define FPGA_DEBUG
#endif
@ -307,5 +305,3 @@ static int xilinx_validate (Xilinx_desc * desc, char *fn)
return ret_val;
}
#endif /* CONFIG_FPGA && CONFIG_FPGA_XILINX */

2
cpu/arm920t/s3c24x0/nand.c
View File

@ -27,7 +27,7 @@
#endif
#if defined(CONFIG_CMD_NAND)
#if !defined(CFG_NAND_LEGACY)
#if !defined(CONFIG_NAND_LEGACY)
#include <nand.h>
#include <s3c2410.h>

2
cpu/arm926ejs/davinci/nand.c
View File

@ -45,7 +45,7 @@
#include <asm/io.h>
#ifdef CFG_USE_NAND
#if !defined(CFG_NAND_LEGACY)
#if !defined(CONFIG_NAND_LEGACY)
#include <nand.h>
#include <asm/arch/nand_defs.h>

2
cpu/ppc4xx/ndfc.c
View File

@ -31,7 +31,7 @@
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY) && \
#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_NAND_LEGACY) && \
(defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \

2
doc/README.nand
View File

@ -184,7 +184,7 @@ We now use a complete rewrite of the NAND code based on what is in
The old NAND handling code has been re-factored and is now confined
to only board-specific files and - unfortunately - to the DoC code
(see below). A new configuration variable has been introduced:
CFG_NAND_LEGACY, which has to be defined in the board config file if
CONFIG_NAND_LEGACY, which has to be defined in the board config file if
that board uses legacy code.
The necessary changes have been made to all affected boards, and no

10
drivers/block/Makefile
View File

@ -25,14 +25,14 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libblock.a
COBJS-y += ahci.o
COBJS-y += ata_piix.o
COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
COBJS-$(CONFIG_ATA_PIIX) += ata_piix.o
COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o
COBJS-$(CONFIG_LIBATA) += libata.o
COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
COBJS-y += sil680.o
COBJS-y += sym53c8xx.o
COBJS-y += systemace.o
COBJS-$(CONFIG_IDE_SIL680) += sil680.o
COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
COBJS-$(CONFIG_SYSTEMACE) += systemace.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

3
drivers/block/ahci.c
View File

@ -26,8 +26,6 @@
*/
#include <common.h>
#ifdef CONFIG_SCSI_AHCI
#include <command.h>
#include <pci.h>
#include <asm/processor.h>
@ -700,4 +698,3 @@ void scsi_print_error(ccb * pccb)
{
/*The ahci error info can be read in the ahci driver*/
}
#endif

4
drivers/block/ata_piix.c
View File

@ -35,8 +35,6 @@
#include <ide.h>
#include <ata.h>
#ifdef CFG_ATA_PIIX /*ata_piix driver */
extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAX_DEVICE];
extern int curr_device;
@ -756,5 +754,3 @@ int scan_sata(int dev)
{
return 0;
}
#endif

5
drivers/block/sil680.c
View File

@ -27,7 +27,7 @@
* The following parameters must be defined in the configuration file
* of the target board:
*
* #define CFG_IDE_SIL680
* #define CONFIG_IDE_SIL680
*
* #define CONFIG_PCI_PNP
* NOTE it may also be necessary to define this if the default of 8 is
@ -54,7 +54,6 @@
*/
#include <common.h>
#if defined(CFG_IDE_SIL680)
#include <ata.h>
#include <ide.h>
#include <pci.h>
@ -106,5 +105,3 @@ int ide_preinit (void)
void ide_set_reset (int flag) {
return;
}
#endif /* CFG_IDE_SIL680 */

5
drivers/block/sym53c8xx.c
View File

@ -35,8 +35,6 @@
#include <common.h>
#ifdef CONFIG_SCSI_SYM53C8XX
#include <command.h>
#include <pci.h>
#include <asm/processor.h>
@ -870,6 +868,3 @@ void scsi_chip_init(void)
#endif
}
#endif
#endif /* CONFIG_SCSI_SYM53C8XX */

3
drivers/block/systemace.c
View File

@ -44,8 +44,6 @@
#include <part.h>
#include <asm/io.h>
#ifdef CONFIG_SYSTEMACE
/*
* The ace_readw and writew functions read/write 16bit words, but the
* offset value is the BYTE offset as most used in the Xilinx
@ -255,4 +253,3 @@ static unsigned long systemace_read(int dev, unsigned long start,
return blkcnt;
}
#endif /* CONFIG_SYSTEMACE */

3
drivers/dma/MCD_dmaApi.c
View File

@ -24,8 +24,6 @@
#include <common.h>
#ifdef CONFIG_FSLDMAFEC
#include <MCD_dma.h>
#include <MCD_tasksInit.h>
#include <MCD_progCheck.h>
@ -1023,4 +1021,3 @@ static void MCD_memcpy(int *dest, int *src, u32 size)
for (i = 0; i < size; i += sizeof(int), dest++, src++)
*dest = *src;
}
#endif /* CONFIG_FSLDMAFEC */

4
drivers/dma/MCD_tasks.c
View File

@ -24,8 +24,6 @@
#include <common.h>
#ifdef CONFIG_FSLDMAFEC
#include <MCD_dma.h>
u32 MCD_varTab0[];
@ -2430,5 +2428,3 @@ u32 MCD_ENetXmit_TDT[] = {
#ifdef MCD_INCLUDE_EU
MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
#endif
#endif /* CONFIG_FSLDMAFEC */

4
drivers/dma/MCD_tasksInit.c
View File

@ -28,8 +28,6 @@
* Do not edit!
*/
#ifdef CONFIG_FSLDMAFEC
#include <MCD_dma.h>
extern dmaRegs *MCD_dmaBar;
@ -242,5 +240,3 @@ void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr,
/* Set the task's Enable bit in its Task Control Register */
MCD_dmaBar->taskControl[channel] |= (u16) 0x8000;
}
#endif /* CONFIG_FSLDMAFEC */

2
drivers/dma/Makefile
View File

@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libdma.a
COBJS-y += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
COBJS-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

8
drivers/input/Makefile
View File

@ -25,9 +25,11 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libinput.a
COBJS-y += i8042.o
COBJS-y += keyboard.o
COBJS-y += pc_keyb.o ps2ser.o ps2mult.o
COBJS-$(CONFIG_I8042_KBD) += i8042.o
ifdef CONFIG_PS2KBD
COBJS-y += keyboard.o pc_keyb.o
COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
endif
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

4
drivers/input/i8042.c
View File

@ -27,8 +27,6 @@
#include <common.h>
#ifdef CONFIG_I8042_KBD
#ifdef CONFIG_USE_CPCIDVI
extern u8 gt_cpcidvi_in8(u32 offset);
extern void gt_cpcidvi_out8(u32 offset, u8 data);
@ -670,5 +668,3 @@ static int kbd_reset (void)
return 0;
}
#endif /* CONFIG_I8042_KBD */

4
drivers/input/keyboard.c
View File

@ -11,8 +11,6 @@
#include <common.h>
#ifdef CONFIG_PS2KBD
#include <devices.h>
#include <keyboard.h>
@ -301,5 +299,3 @@ int kbd_init (void)
}
return error;
}
#endif /* CONFIG_PS2KBD */

4
drivers/input/pc_keyb.c
View File

@ -13,8 +13,6 @@
#include <common.h>
#ifdef CONFIG_PS2KBD
#include <keyboard.h>
#include <pc_keyb.h>
@ -252,5 +250,3 @@ void pckbd_leds(unsigned char leds)
kbd_send_data(KBD_CMD_SET_LEDS);
kbd_send_data(leds);
}
#endif /* CONFIG_PS2KBD */

4
drivers/input/ps2mult.c
View File

@ -16,8 +16,6 @@
#include <common.h>
#ifdef CONFIG_PS2MULT
#include <pc_keyb.h>
#include <asm/atomic.h>
#include <ps2mult.h>
@ -462,5 +460,3 @@ int ps2mult_request_irq(void (*handler)(void *))
return 0;
}
#endif /* CONFIG_PS2MULT */

4
drivers/input/ps2ser.c
View File

@ -15,8 +15,6 @@
#include <common.h>
#ifdef CONFIG_PS2SERIAL
#include <asm/io.h>
#include <asm/atomic.h>
#include <ps2mult.h>
@ -326,5 +324,3 @@ static void ps2ser_interrupt(void *dev_id)
ps2mult_callback(atomic_read(&ps2buf_cnt));
}
}
#endif /* CONFIG_PS2SERIAL */

6
drivers/misc/Makefile
View File

@ -25,10 +25,10 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libmisc.a
COBJS-y += ali512x.o
COBJS-y += ns87308.o
COBJS-y += status_led.o
COBJS-$(CONFIG_ALI152X) += ali512x.o
COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
COBJS-$(CONFIG_NS87308) += ns87308.o
COBJS-$(CONFIG_STATUS_LED) += status_led.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

5
drivers/misc/ali512x.c
View File

@ -32,8 +32,6 @@
#include <config.h>
#ifdef CONFIG_ALI152X
#include <common.h>
#include <asm/io.h>
#include <asm/ic/ali512x.h>
@ -418,6 +416,3 @@ int ali512x_cio_in(int pin)
return data & bit;
}
#endif

4
drivers/misc/ns87308.c
View File

@ -23,8 +23,6 @@
#include <config.h>
#ifdef CFG_NS87308
#include <ns87308.h>
void initialise_ns87308 (void)
@ -117,5 +115,3 @@ void initialise_ns87308 (void)
PNP_PGCS_CSLINE_CONF(2, CFG_NS87308_CS2_CONF);
#endif
}
#endif

4
drivers/misc/status_led.c
View File

@ -35,8 +35,6 @@
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_STATUS_LED
typedef struct {
led_id_t mask;
int state;
@ -127,5 +125,3 @@ void status_led_set (int led, int state)
}
__led_set (ld->mask, state);
}
#endif /* CONFIG_STATUS_LED */

6
drivers/mtd/Makefile
View File

@ -25,11 +25,11 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libmtd.a
COBJS-y += at45.o
COBJS-y += cfi_flash.o
COBJS-$(CONFIG_HAS_DATAFLASH) += at45.o
COBJS-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
COBJS-$(CONFIG_HAS_DATAFLASH) += dataflash.o
COBJS-y += mw_eeprom.o
COBJS-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
COBJS-$(CONFIG_MW_EEPROM) += mw_eeprom.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

3
drivers/mtd/at45.c
View File

@ -20,8 +20,6 @@
#include <config.h>
#include <common.h>
#ifdef CONFIG_HAS_DATAFLASH
#include <dataflash.h>
/*
@ -559,4 +557,3 @@ int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
AT91F_DataFlashGetStatus(pDesc);
return ((pDesc->command[1] == 0xFF) ? 0 : pDesc->command[1] & 0x3C);
}
#endif

3
drivers/mtd/cfi_flash.c
View File

@ -39,7 +39,6 @@
#include <asm/io.h>
#include <asm/byteorder.h>
#include <environment.h>
#ifdef CFG_FLASH_CFI_DRIVER
/*
* This file implements a Common Flash Interface (CFI) driver for
@ -2015,5 +2014,3 @@ unsigned long flash_init (void)
#endif
return (size);
}
#endif /* CFG_FLASH_CFI */

5
drivers/mtd/mw_eeprom.c
View File

@ -1,9 +1,6 @@
/* Three-wire (MicroWire) serial eeprom driver (for 93C46 and compatibles) */
#include <common.h>
#ifdef CONFIG_MW_EEPROM
#include <ssi.h>
/*
@ -237,5 +234,3 @@ int mw_eeprom_probe(int dev)
}
return 0;
}
#endif

10
drivers/mtd/nand/Makefile
View File

@ -25,15 +25,19 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.a
ifdef CONFIG_CMD_NAND
ifndef CONFIG_NAND_LEGACY
COBJS-y += nand.o
COBJS-y += nand_base.o
COBJS-y += nand_ids.o
COBJS-y += nand_ecc.o
COBJS-y += nand_bbt.o
COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
endif
COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
COBJS-y += fsl_upm.o
COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
endif
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

2
drivers/mtd/nand/diskonchip.c
View File

@ -21,7 +21,7 @@
#include <common.h>
#if !defined(CFG_NAND_LEGACY)
#if !defined(CONFIG_NAND_LEGACY)
#include <linux/kernel.h>
#include <linux/init.h>

3
drivers/mtd/nand/fsl_upm.c
View File

@ -11,8 +11,6 @@
*/
#include <config.h>
#if defined(CONFIG_CMD_NAND) && defined(CONFIG_NAND_FSL_UPM)
#include <common.h>
#include <asm/io.h>
#include <asm/errno.h>
@ -150,4 +148,3 @@ int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun)
return 0;
}
#endif /* CONFIG_CMD_NAND */

5
drivers/mtd/nand/nand.c
View File

@ -22,9 +22,6 @@
*/
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <nand.h>
#ifndef CFG_NAND_BASE_LIST
@ -79,5 +76,3 @@ void nand_init(void)
board_nand_select_device(nand_info[nand_curr_device].priv, nand_curr_device);
#endif
}
#endif

5
drivers/mtd/nand/nand_base.c
View File

@ -59,8 +59,6 @@
#define ENOTSUPP 524 /* Operation is not supported */
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <malloc.h>
#include <watchdog.h>
#include <linux/err.h>
@ -2822,6 +2820,3 @@ MODULE_LICENSE("GPL");
MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
MODULE_DESCRIPTION("Generic NAND flash driver code");
#endif
#endif

5
drivers/mtd/nand/nand_bbt.c
View File

@ -53,9 +53,6 @@
*/
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <malloc.h>
#include <linux/mtd/compat.h>
#include <linux/mtd/mtd.h>
@ -1237,5 +1234,3 @@ int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt)
EXPORT_SYMBOL(nand_scan_bbt);
EXPORT_SYMBOL(nand_default_bbt);
#endif
#endif

4
drivers/mtd/nand/nand_ecc.c
View File

@ -39,8 +39,6 @@
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
/* XXX U-BOOT XXX */
#if 0
#include <linux/types.h>
@ -215,5 +213,3 @@ int nand_correct_data(struct mtd_info *mtd, u_char *dat,
#if 0
EXPORT_SYMBOL(nand_correct_data);
#endif
#endif

4
drivers/mtd/nand/nand_ids.c
View File

@ -12,9 +12,6 @@
*/
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand.h>
/*
* Chip ID list
@ -147,4 +144,3 @@ struct nand_manufacturers nand_manuf_ids[] = {
{NAND_MFR_MICRON, "Micron"},
{0x0, "Unknown"}
};
#endif

5
drivers/mtd/nand/nand_util.c
View File

@ -31,9 +31,6 @@
*/
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <command.h>
#include <watchdog.h>
#include <malloc.h>
@ -606,5 +603,3 @@ int nand_read_skip_bad(nand_info_t *nand, size_t offset, size_t *length,
return 0;
}
#endif /* defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY) */

5
drivers/mtd/nand_legacy/Makefile
View File

@ -25,8 +25,11 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand_legacy.a
COBJS := nand_legacy.o
ifdef CONFIG_CMD_NAND
COBJS-$(CONFIG_NAND_LEGACY) := nand_legacy.o
endif
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

5
drivers/mtd/nand_legacy/nand_legacy.c
View File

@ -14,9 +14,6 @@
#include <malloc.h>
#include <asm/io.h>
#include <watchdog.h>
#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#include <linux/mtd/nand_ids.h>
#include <jffs2/jffs2.h>
@ -1608,5 +1605,3 @@ int read_jffs2_nand(size_t start, size_t len,
start, len, retlen, buf);
}
#endif /* CONFIG_JFFS2_NAND */
#endif

3
drivers/mtd/onenand/Makefile
View File

@ -25,8 +25,9 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libonenand.a
COBJS := onenand_uboot.o onenand_base.o onenand_bbt.o
COBJS-$(CONFIG_CMD_ONENAND) := onenand_uboot.o onenand_base.o onenand_bbt.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

5
drivers/mtd/onenand/onenand_base.c
View File

@ -10,9 +10,6 @@
*/
#include <common.h>
#ifdef CONFIG_CMD_ONENAND
#include <linux/mtd/compat.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/onenand.h>
@ -1304,5 +1301,3 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
void onenand_release(struct mtd_info *mtd)
{
}
#endif /* CONFIG_CMD_ONENAND */

5
drivers/mtd/onenand/onenand_bbt.c
View File

@ -15,9 +15,6 @@
*/
#include <common.h>
#ifdef CONFIG_CMD_ONENAND
#include <linux/mtd/compat.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/onenand.h>
@ -261,5 +258,3 @@ int onenand_default_bbt(struct mtd_info *mtd)
return onenand_scan_bbt(mtd, bbm->badblock_pattern);
}
#endif /* CFG_CMD_ONENAND */

5
drivers/mtd/onenand/onenand_uboot.c
View File

@ -14,9 +14,6 @@
*/
#include <common.h>
#ifdef CONFIG_CMD_ONENAND
#include <linux/mtd/compat.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/onenand.h>
@ -37,5 +34,3 @@ void onenand_init(void)
puts("OneNAND: ");
print_size(onenand_mtd.size, "\n");
}
#endif /* CONFIG_CMD_ONENAND */

10
drivers/pci/Makefile
View File

@ -25,15 +25,13 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libpci.a
COBJS-y += fsl_pci_init.o
COBJS-y += pci.o
COBJS-y += pci_auto.o
COBJS-y += pci_indirect.o
COBJS-y += tsi108_pci.o
COBJS-y += w83c553f.o
COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o
COBJS-$(CONFIG_PCI) += pci.o pci_auto.o pci_indirect.o
COBJS-$(CONFIG_SH4_PCI) += pci_sh4.o
COBJS-$(CONFIG_SH7751_PCI) +=pci_sh7751.o
COBJS-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
COBJS-$(CONFIG_TSI108_PCI) += tsi108_pci.o
COBJS-$(CONFIG_WINBOND_83C553) += w83c553f.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

4
drivers/pci/fsl_pci_init.c
View File

@ -18,8 +18,6 @@
#include <common.h>
#ifdef CONFIG_FSL_PCI_INIT
/*
* PCI/PCIE Controller initialization for mpc85xx/mpc86xx soc's
*
@ -197,5 +195,3 @@ fsl_pci_init(struct pci_controller *hose)
pci_hose_write_config_word(hose, dev, PCI_SEC_STATUS, 0xffff);
}
}
#endif /* CONFIG_FSL_PCI */

4
drivers/pci/pci.c
View File

@ -30,8 +30,6 @@
#include <common.h>
#ifdef CONFIG_PCI
#include <command.h>
#include <asm/processor.h>
#include <asm/io.h>
@ -544,5 +542,3 @@ void pci_init(void)
/* now call board specific pci_init()... */
pci_init_board();
}
#endif /* CONFIG_PCI */

4
drivers/pci/pci_auto.c
View File

@ -15,8 +15,6 @@
#include <common.h>
#ifdef CONFIG_PCI
#include <pci.h>
#undef DEBUG
@ -408,5 +406,3 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
return sub_bus;
}
#endif /* CONFIG_PCI */

2
drivers/pci/pci_indirect.c
View File

@ -11,7 +11,6 @@
#include <common.h>
#ifdef CONFIG_PCI
#if (!defined(__I386__) && !defined(CONFIG_IXDP425))
#include <asm/processor.h>
@ -135,4 +134,3 @@ void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
}
#endif /* !__I386__ && !CONFIG_IXDP425 */
#endif /* CONFIG_PCI */

4
drivers/pci/tsi108_pci.c
View File

@ -27,8 +27,6 @@
#include <config.h>
#ifdef CONFIG_TSI108_PCI
#include <common.h>
#include <pci.h>
#include <asm/io.h>
@ -182,5 +180,3 @@ void ft_pci_setup(void *blob, bd_t *bd)
}
}
#endif /* CONFIG_OF_LIBFDT */
#endif /* CONFIG_TSI108_PCI */

4
drivers/pci/w83c553f.c
View File

@ -30,8 +30,6 @@
#include <common.h>
#include <config.h>
#ifdef CFG_WINBOND_83C553
#include <asm/io.h>
#include <pci.h>
@ -222,5 +220,3 @@ void initialise_dma(void)
out8(W83C553F_DMA1 + W83C553F_DMA1_CS, 0x00);
out16(W83C553F_DMA2 + W83C553F_DMA2_CS, 0x0000);
}
#endif /* CFG_WINBOND_83C553 */

3
drivers/qe/Makefile
View File

@ -25,8 +25,9 @@ include $(TOPDIR)/config.mk
LIB := $(obj)qe.a
COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
COBJS := qe.o uccf.o uec.o uec_phy.o $(COBJS-y)
COBJS-$(CONFIG_QE) += qe.o uccf.o uec.o uec_phy.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

3
drivers/qe/qe.c
View File

@ -27,7 +27,6 @@
#include "asm/immap_qe.h"
#include "qe.h"
#if defined(CONFIG_QE)
qe_map_t *qe_immr = NULL;
static qe_snum_t snums[QE_NUM_OF_SNUM];
@ -466,5 +465,3 @@ U_BOOT_CMD(
"fw <addr> [<length>] - Upload firmware binary at address <addr> to "
"the QE,\n\twith optional length <length> verification.\n"
);
#endif /* CONFIG_QE */

2
drivers/qe/uccf.c
View File

@ -28,7 +28,6 @@
#include "qe.h"
#include "uccf.h"
#if defined(CONFIG_QE)
void ucc_fast_transmit_on_demand(ucc_fast_private_t *uccf)
{
out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
@ -401,4 +400,3 @@ int ucc_fast_init(ucc_fast_info_t *uf_info, ucc_fast_private_t **uccf_ret)
*uccf_ret = uccf;
return 0;
}
#endif /* CONFIG_QE */

5
drivers/qe/uec.c
View File

@ -31,8 +31,6 @@
#include "uec_phy.h"
#include "miiphy.h"
#if defined(CONFIG_QE)
#ifdef CONFIG_UEC_ETH1
static uec_info_t eth1_uec_info = {
.uf_info = {
@ -1406,6 +1404,3 @@ int uec_initialize(int index)
return 1;
}
#endif /* CONFIG_QE */

3
drivers/qe/uec_phy.c
View File

@ -26,8 +26,6 @@
#include "uec_phy.h"
#include "miiphy.h"
#if defined(CONFIG_QE)
#define ugphy_printk(format, arg...) \
printf(format "\n", ## arg)
@ -677,4 +675,3 @@ void change_phy_interface_mode (struct eth_device *dev, enet_interface_e mode)
marvell_phy_interface_mode (dev, mode);
#endif
}
#endif /* CONFIG_QE */

4
drivers/serial/Makefile
View File

@ -27,7 +27,7 @@ LIB := $(obj)libserial.a
COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o
COBJS-$(CONFIG_MCFUART) += mcfuart.o
COBJS-y += ns9750_serial.o
COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o
COBJS-y += ns16550.o
COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
COBJS-y += serial.o
@ -35,7 +35,7 @@ COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o
COBJS-y += serial_pl010.o
COBJS-y += serial_pl011.o
COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
COBJS-y += serial_sh.o
COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
COBJS-$(CONFIG_USB_TTY) += usbtty.o
COBJS := $(COBJS-y)

4
drivers/serial/ns9750_serial.c
View File

@ -28,8 +28,6 @@
#include <common.h>
#ifdef CFG_NS9750_UART
#include "ns9750_bbus.h" /* for GPIOs */
#include "ns9750_ser.h" /* for serial configuration */
@ -210,5 +208,3 @@ static unsigned int calcRxCharGapRegister( void )
{
return NS9750_SER_RX_CHAR_TIMER_TRUN;
}
#endif /* CFG_NS9750_UART */

4
drivers/serial/serial.c
View File

@ -26,7 +26,7 @@
#ifdef CFG_NS16550_SERIAL
#include <ns16550.h>
#ifdef CFG_NS87308
#ifdef CONFIG_NS87308
#include <ns87308.h>
#endif
@ -159,7 +159,7 @@ int serial_init (void)
{
int clock_divisor;
#ifdef CFG_NS87308
#ifdef CONFIG_NS87308
initialise_ns87308();
#endif

4
drivers/serial/serial_sh.c
View File

@ -20,8 +20,6 @@
#include <common.h>
#include <asm/processor.h>
#ifdef CFG_SCIF_CONSOLE
#if defined (CONFIG_CONS_SCIF0)
#define SCIF_BASE SCIF0_BASE
#elif defined (CONFIG_CONS_SCIF1)
@ -215,5 +213,3 @@ int serial_getc(void)
return ch;
}
#endif /* CFG_SCIF_CONSOLE */

6
fs/jffs2/jffs2_1pass.c
View File

@ -146,7 +146,7 @@ static struct part_info *current_part;
#if (defined(CONFIG_JFFS2_NAND) && \
defined(CONFIG_CMD_NAND) )
#if defined(CFG_NAND_LEGACY)
#if defined(CONFIG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#else
#include <nand.h>
@ -161,7 +161,7 @@ static struct part_info *current_part;
*
*/
#if defined(CFG_NAND_LEGACY)
#if defined(CONFIG_NAND_LEGACY)
/* this one defined in nand_legacy.c */
int read_jffs2_nand(size_t start, size_t len,
size_t * retlen, u_char * buf, int nanddev);
@ -201,7 +201,7 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
}
}
#if defined(CFG_NAND_LEGACY)
#if defined(CONFIG_NAND_LEGACY)
if (read_jffs2_nand(nand_cache_off, NAND_CACHE_SIZE,
&retlen, nand_cache, id->num) < 0 ||
retlen != NAND_CACHE_SIZE) {

2
fs/jffs2/jffs2_nand_1pass.c
View File

@ -1,6 +1,6 @@
#include <common.h>
#if !defined(CFG_NAND_LEGACY) && defined(CONFIG_CMD_JFFS2)
#if !defined(CONFIG_NAND_LEGACY) && defined(CONFIG_CMD_JFFS2)
#include <malloc.h>
#include <linux/stat.h>

2
include/configs/APC405.h
View File

@ -269,7 +269,7 @@ extern int flash_banks;
#define CFG_FLASH_BASE 0xFE000000
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
#define CFG_MAX_FLASH_BANKS flash_banks /* max num of flash banks */
/* updated in board_early_init_r */

2
include/configs/ATUM8548.h
View File

@ -182,7 +182,7 @@
#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
#define CFG_FLASH_CFI_DRIVER 1
#define CONFIG_FLASH_CFI_DRIVER 1
#define CFG_FLASH_CFI 1
#define CFG_FLASH_EMPTY_INFO

2
include/configs/Adder.h
View File

@ -143,7 +143,7 @@
*/
#define CFG_FLASH_BASE 0xFE000000
#define CFG_FLASH_CFI /* The flash is CFI compatible */
#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
#define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */
#define CFG_MAX_FLASH_SECT 128 /* Max num of sects on one chip */

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