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83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x

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Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
Peter Tyser 2009-05-22 17:23:25 -05:00 committed by Wolfgang Denk
parent 0f89860494
commit 2c7920afaf
24 changed files with 85 additions and 85 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
cpu/mpc83xx/cpu_init.c
View File

@ -185,7 +185,7 @@ void cpu_init_f (volatile immap_t * im)
/* System General Purpose Register */
#ifdef CONFIG_SYS_SICRH
#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC8313)
#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC8313)
/* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */
im->sysconf.sicrh = (im->sysconf.sicrh & 0x0000000C) | CONFIG_SYS_SICRH;
#else

66
cpu/mpc83xx/speed.c
View File

@ -100,23 +100,23 @@ int get_clocks(void)
u32 lcrr;
u32 csb_clk;
#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
u32 tsec1_clk;
u32 tsec2_clk;
u32 usbdr_clk;
#endif
#ifdef CONFIG_MPC834X
#ifdef CONFIG_MPC834x
u32 usbmph_clk;
#endif
u32 core_clk;
u32 i2c1_clk;
#if !defined(CONFIG_MPC832X)
#if !defined(CONFIG_MPC832x)
u32 i2c2_clk;
#endif
#if defined(CONFIG_MPC8315)
u32 tdm_clk;
#endif
#if defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC837x)
u32 sdhc_clk;
#endif
u32 enc_clk;
@ -126,17 +126,17 @@ int get_clocks(void)
#if defined(CONFIG_MPC8360)
u32 mem_sec_clk;
#endif
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X)
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x)
u32 qepmf;
u32 qepdf;
u32 qe_clk;
u32 brg_clk;
#endif
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC831X)
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x)
u32 pciexp1_clk;
u32 pciexp2_clk;
#endif
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315)
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
u32 sata_clk;
#endif
@ -164,7 +164,7 @@ int get_clocks(void)
sccr = im->clk.sccr;
#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) {
case 0:
tsec1_clk = 0;
@ -202,7 +202,7 @@ int get_clocks(void)
}
#endif
#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315)
#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) {
case 0:
tsec2_clk = 0;
@ -229,7 +229,7 @@ int get_clocks(void)
tsec2_clk = 0;
#endif
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
switch ((sccr & SCCR_USBMPHCM) >> SCCR_USBMPHCM_SHIFT) {
case 0:
usbmph_clk = 0;
@ -274,7 +274,7 @@ int get_clocks(void)
return -7;
}
#if defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC837x)
switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) {
case 0:
sdhc_clk = 0;
@ -313,22 +313,22 @@ int get_clocks(void)
}
#endif
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
i2c1_clk = tsec2_clk;
#elif defined(CONFIG_MPC8360)
i2c1_clk = csb_clk;
#elif defined(CONFIG_MPC832X)
#elif defined(CONFIG_MPC832x)
i2c1_clk = enc_clk;
#elif defined(CONFIG_MPC831X)
#elif defined(CONFIG_MPC831x)
i2c1_clk = enc_clk;
#elif defined(CONFIG_MPC837X)
#elif defined(CONFIG_MPC837x)
i2c1_clk = sdhc_clk;
#endif
#if !defined(CONFIG_MPC832X)
#if !defined(CONFIG_MPC832x)
i2c2_clk = csb_clk; /* i2c-2 clk is equal to csb clk */
#endif
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC831X)
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x)
switch ((sccr & SCCR_PCIEXP1CM) >> SCCR_PCIEXP1CM_SHIFT) {
case 0:
pciexp1_clk = 0;
@ -366,7 +366,7 @@ int get_clocks(void)
}
#endif
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315)
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
switch ((sccr & SCCR_SATA1CM) >> SCCR_SATA1CM_SHIFT) {
case 0:
sata_clk = 0;
@ -436,7 +436,7 @@ int get_clocks(void)
return -13;
}
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X)
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x)
qepmf = (im->reset.rcwl & HRCWL_CEPMF) >> HRCWL_CEPMF_SHIFT;
qepdf = (im->reset.rcwl & HRCWL_CEPDF) >> HRCWL_CEPDF_SHIFT;
qe_clk = (pci_sync_in * qepmf) / (1 + qepdf);
@ -444,23 +444,23 @@ int get_clocks(void)
#endif
gd->csb_clk = csb_clk;
#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
gd->tsec1_clk = tsec1_clk;
gd->tsec2_clk = tsec2_clk;
gd->usbdr_clk = usbdr_clk;
#endif
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
gd->usbmph_clk = usbmph_clk;
#endif
#if defined(CONFIG_MPC8315)
gd->tdm_clk = tdm_clk;
#endif
#if defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC837x)
gd->sdhc_clk = sdhc_clk;
#endif
gd->core_clk = core_clk;
gd->i2c1_clk = i2c1_clk;
#if !defined(CONFIG_MPC832X)
#if !defined(CONFIG_MPC832x)
gd->i2c2_clk = i2c2_clk;
#endif
gd->enc_clk = enc_clk;
@ -470,15 +470,15 @@ int get_clocks(void)
#if defined(CONFIG_MPC8360)
gd->mem_sec_clk = mem_sec_clk;
#endif
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X)
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x)
gd->qe_clk = qe_clk;
gd->brg_clk = brg_clk;
#endif
#if defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC837x)
gd->pciexp1_clk = pciexp1_clk;
gd->pciexp2_clk = pciexp2_clk;
#endif
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315)
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
gd->sata_clk = sata_clk;
#endif
gd->pci_clk = pci_sync_in;
@ -504,7 +504,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
printf("Clock configuration:\n");
printf(" Core: %-4s MHz\n", strmhz(buf, gd->core_clk));
printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk));
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X)
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x)
printf(" QE: %-4s MHz\n", strmhz(buf, gd->qe_clk));
printf(" BRG: %-4s MHz\n", strmhz(buf, gd->brg_clk));
#endif
@ -516,28 +516,28 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
#endif
printf(" SEC: %-4s MHz\n", strmhz(buf, gd->enc_clk));
printf(" I2C1: %-4s MHz\n", strmhz(buf, gd->i2c1_clk));
#if !defined(CONFIG_MPC832X)
#if !defined(CONFIG_MPC832x)
printf(" I2C2: %-4s MHz\n", strmhz(buf, gd->i2c2_clk));
#endif
#if defined(CONFIG_MPC8315)
printf(" TDM: %-4s MHz\n", strmhz(buf, gd->tdm_clk));
#endif
#if defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC837x)
printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->sdhc_clk));
#endif
#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
printf(" TSEC1: %-4s MHz\n", strmhz(buf, gd->tsec1_clk));
printf(" TSEC2: %-4s MHz\n", strmhz(buf, gd->tsec2_clk));
printf(" USB DR: %-4s MHz\n", strmhz(buf, gd->usbdr_clk));
#endif
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
printf(" USB MPH: %-4s MHz\n", strmhz(buf, gd->usbmph_clk));
#endif
#if defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC837x)
printf(" PCIEXP1: %-4s MHz\n", strmhz(buf, gd->pciexp1_clk));
printf(" PCIEXP2: %-4s MHz\n", strmhz(buf, gd->pciexp2_clk));
#endif
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315)
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
printf(" SATA: %-4s MHz\n", strmhz(buf, gd->sata_clk));
#endif
return 0;

6
doc/README.mpc832xemds
View File

@ -83,8 +83,8 @@ Freescale MPC832XEMDS Board
include/configs/MPC832XEPB.h
CONFIG_MPC83xx MPC83XX family for MPC8349, MPC8360 and MPC832X
CONFIG_MPC832X MPC832X specific
CONFIG_MPC83xx MPC83xx family for MPC8349, MPC8360 and MPC832x
CONFIG_MPC832x MPC832x specific
CONFIG_MPC832XEMDS MPC832XEMDS board specific
4. Compilation
@ -97,7 +97,7 @@ Freescale MPC832XEMDS Board
make MPC832XEMDS_config
make
MPC832X support PCI 33MHz and PCI 66MHz, to make u-boot support PCI:
MPC832x support PCI 33MHz and PCI 66MHz, to make u-boot support PCI:
1)Make sure the DIP SW support PCI mode as described in Section 1.1.

2
doc/README.mpc837xemds
View File

@ -61,7 +61,7 @@ Freescale MPC837xEMDS Board
include/configs/MPC837XEMDS.h
CONFIG_MPC83xx MPC83xx family for both MPC837x and MPC8360
CONFIG_MPC837X MPC837x specific
CONFIG_MPC837x MPC837x specific
CONFIG_MPC837XEMDS MPC837XEMDS board specific
4. Compilation

2
doc/README.mpc837xerdb
View File

@ -53,7 +53,7 @@ Freescale MPC837xE-RDB Board
include/configs/MPC837XERDB.h
CONFIG_MPC83xx MPC83xx family for both MPC8349 and MPC8360
CONFIG_MPC837X MPC837x specific
CONFIG_MPC837x MPC837x specific
CONFIG_MPC837XERDB MPC837xE-RDB board specific

2
drivers/pci/pci_auto.c
View File

@ -403,7 +403,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
PCI_DEV(dev));
break;
#endif
#ifdef CONFIG_MPC834X
#ifdef CONFIG_MPC834x
case PCI_CLASS_BRIDGE_OTHER:
/*
* The host/PCI bridge 1 seems broken in 8349 - it presents

4
include/asm-ppc/fsl_lbc.h
View File

@ -54,7 +54,7 @@
#define BR_MS_UPMA 0x00000080 /* UPMA */
#define BR_MS_UPMB 0x000000A0 /* UPMB */
#define BR_MS_UPMC 0x000000C0 /* UPMC */
#if !defined(CONFIG_MPC834X)
#if !defined(CONFIG_MPC834x)
#define BR_ATOM 0x0000000C
#define BR_ATOM_SHIFT 2
#endif
@ -65,7 +65,7 @@
#define UPMB 1
#define UPMC 2
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
#define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_V)
#else
#define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_ATOM | BR_V)

12
include/asm-ppc/global_data.h
View File

@ -59,14 +59,14 @@ typedef struct global_data {
#if defined(CONFIG_MPC83xx)
/* There are other clocks in the MPC83XX */
u32 csb_clk;
#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
u32 tsec1_clk;
u32 tsec2_clk;
u32 usbdr_clk;
#endif
#if defined (CONFIG_MPC834X)
#if defined (CONFIG_MPC834x)
u32 usbmph_clk;
#endif /* CONFIG_MPC834X */
#endif /* CONFIG_MPC834x */
#if defined(CONFIG_MPC8315)
u32 tdm_clk;
#endif
@ -75,18 +75,18 @@ typedef struct global_data {
u32 lbiu_clk;
u32 lclk_clk;
u32 pci_clk;
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC831X)
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x)
u32 pciexp1_clk;
u32 pciexp2_clk;
#endif
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315)
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
u32 sata_clk;
#endif
#if defined(CONFIG_MPC8360)
u32 mem_sec_clk;
#endif /* CONFIG_MPC8360 */
#endif
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8536)
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8536)
u32 sdhc_clk;
#endif
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)

6
include/asm-ppc/immap_83xx.h
View File

@ -656,7 +656,7 @@ typedef struct tdmdmac83xx {
u8 fixme[0x2000];
} tdmdmac83xx_t;
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
typedef struct immap {
sysconf83xx_t sysconf; /* System configuration */
wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */
@ -773,7 +773,7 @@ typedef struct immap {
u8 res12[0x1CF00];
} immap_t;
#elif defined(CONFIG_MPC837X)
#elif defined(CONFIG_MPC837x)
typedef struct immap {
sysconf83xx_t sysconf; /* System configuration */
wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */
@ -857,7 +857,7 @@ typedef struct immap {
u8 qe[0x100000]; /* QE block */
} immap_t;
#elif defined(CONFIG_MPC832X)
#elif defined(CONFIG_MPC832x)
typedef struct immap {
sysconf83xx_t sysconf; /* System configuration */
wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */

2
include/asm-ppc/immap_qe.h
View File

@ -603,7 +603,7 @@ extern qe_map_t *qe_immr;
#define QE_MURAM_SIZE 0x20000UL
#elif defined(CONFIG_MPC8360)
#define QE_MURAM_SIZE 0xc000UL
#elif defined(CONFIG_MPC832X)
#elif defined(CONFIG_MPC832x)
#define QE_MURAM_SIZE 0x4000UL
#endif

4
include/asm-ppc/mpc8xxx_spi.h
View File

@ -27,10 +27,10 @@
#include <asm/types.h>
#if defined(CONFIG_MPC834X) || \
#if defined(CONFIG_MPC834x) || \
defined(CONFIG_MPC8313) || \
defined(CONFIG_MPC8315) || \
defined(CONFIG_MPC837X)
defined(CONFIG_MPC837x)
typedef struct spi8xxx {
u8 res0[0x20]; /* 0x0-0x01f reserved */

2
include/configs/MPC8313ERDB.h
View File

@ -31,7 +31,7 @@
*/
#define CONFIG_E300 1
#define CONFIG_MPC83xx 1
#define CONFIG_MPC831X 1
#define CONFIG_MPC831x 1
#define CONFIG_MPC8313 1
#define CONFIG_MPC8313ERDB 1

2
include/configs/MPC8315ERDB.h
View File

@ -30,7 +30,7 @@
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC831X 1 /* MPC831x CPU family */
#define CONFIG_MPC831x 1 /* MPC831x CPU family */
#define CONFIG_MPC8315 1 /* MPC8315 CPU specific */
#define CONFIG_MPC8315ERDB 1 /* MPC8315ERDB board specific */

2
include/configs/MPC8323ERDB.h
View File

@ -15,7 +15,7 @@
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC832X 1 /* MPC832x CPU specific */
#define CONFIG_MPC832x 1 /* MPC832x CPU specific */
#define CONFIG_PCI 1
#define CONFIG_83XX_GENERIC_PCI 1

2
include/configs/MPC832XEMDS.h
View File

@ -26,7 +26,7 @@
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC832X 1 /* MPC832x CPU specific */
#define CONFIG_MPC832x 1 /* MPC832x CPU specific */
#define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */
#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */
#undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */

2
include/configs/MPC8349EMDS.h
View File

@ -34,7 +34,7 @@
*/
#define CONFIG_E300 1 /* E300 Family */
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC834X 1 /* MPC834X family */
#define CONFIG_MPC834x 1 /* MPC834x family */
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */

2
include/configs/MPC8349ITX.h
View File

@ -63,7 +63,7 @@
/*
* High Level Configuration Options
*/
#define CONFIG_MPC834X /* MPC834x family (8343, 8347, 8349) */
#define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */
#define CONFIG_MPC8349 /* MPC8349 specific */
#define CONFIG_SYS_IMMR 0xE0000000 /* The IMMR is relocated to here */

2
include/configs/MPC837XEMDS.h
View File

@ -26,7 +26,7 @@
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC837X 1 /* MPC837X CPU specific */
#define CONFIG_MPC837x 1 /* MPC837x CPU specific */
#define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */
/*

4
include/configs/MPC837XERDB.h
View File

@ -26,8 +26,8 @@
* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_MPC83xx 1 /* MPC83XX family */
#define CONFIG_MPC837X 1 /* MPC837X CPU specific */
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC837x 1 /* MPC837x CPU specific */
#define CONFIG_MPC837XERDB 1
#define CONFIG_PCI 1

2
include/configs/MVBLM7.h
View File

@ -34,7 +34,7 @@
*/
#define CONFIG_E300 1
#define CONFIG_MPC83xx 1
#define CONFIG_MPC834X 1
#define CONFIG_MPC834x 1
#define CONFIG_MPC8343 1
#define CONFIG_SYS_IMMR 0xE0000000

2
include/configs/SIMPC8313.h
View File

@ -33,7 +33,7 @@
#define CONFIG_E300 1
#define CONFIG_MPC83xx 1
#define CONFIG_MPC831X 1
#define CONFIG_MPC831x 1
#define CONFIG_MPC8313 1
#define CONFIG_PCI

2
include/configs/TQM834x.h
View File

@ -33,7 +33,7 @@
*/
#define CONFIG_E300 1 /* E300 Family */
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC834X 1 /* MPC834X specific */
#define CONFIG_MPC834x 1 /* MPC834x specific */
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_TQM834X 1 /* TQM834X board specific */

2
include/configs/sbc8349.h
View File

@ -36,7 +36,7 @@
*/
#define CONFIG_E300 1 /* E300 Family */
#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC834X 1 /* MPC834X family */
#define CONFIG_MPC834x 1 /* MPC834x family */
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */

36
include/mpc83xx.h
View File

@ -54,7 +54,7 @@
#define SPRIDR_PARTID 0xFFFF0000 /* Part Id */
#define SPRIDR_REVID 0x0000FFFF /* Revision Id */
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
#define REVID_MAJOR(spridr) ((spridr & 0x0000FF00) >> 8)
#define REVID_MINOR(spridr) (spridr & 0x000000FF)
#else
@ -100,7 +100,7 @@
#define SPCR_COREPR 0x00300000 /* E300 PowerPC Core system bus request priority */
#define SPCR_COREPR_SHIFT (31-11)
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
/* SPCR bits - MPC8349 specific */
#define SPCR_TSEC1DP 0x00003000 /* TSEC1 data priority */
#define SPCR_TSEC1DP_SHIFT (31-19)
@ -115,7 +115,7 @@
#define SPCR_TSEC2EP 0x00000003 /* TSEC2 emergency priority */
#define SPCR_TSEC2EP_SHIFT (31-31)
#elif defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
#elif defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
/* SPCR bits - MPC831x and MPC837x specific */
#define SPCR_TSECDP 0x00003000 /* TSEC data priority */
#define SPCR_TSECDP_SHIFT (31-19)
@ -127,7 +127,7 @@
/* SICRL/H - System I/O Configuration Register Low/High
*/
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
/* SICRL bits - MPC8349 specific */
#define SICRL_LDP_A 0x80000000
#define SICRL_USB1 0x40000000
@ -190,8 +190,8 @@
#define SICRH_UC2E1OBI 0x00000002
#define SICRH_UC2E2OBI 0x00000001
#elif defined(CONFIG_MPC832X)
/* SICRL bits - MPC832X specific */
#elif defined(CONFIG_MPC832x)
/* SICRL bits - MPC832x specific */
#define SICRL_LDP_LCS_A 0x80000000
#define SICRL_IRQ_CKS 0x20000000
#define SICRL_PCI_MSRC 0x10000000
@ -262,7 +262,7 @@
#define SICRH_TSOBI1 0x00000002
#define SICRH_TSOBI2 0x00000001
#elif defined(CONFIG_MPC837X)
#elif defined(CONFIG_MPC837x)
/* SICRL bits - MPC837x specific */
#define SICRL_USB_A 0xC0000000
#define SICRL_USB_B 0x30000000
@ -424,7 +424,7 @@
#define HRCWL_CORE_TO_CSB_2_5X1 0x00050000
#define HRCWL_CORE_TO_CSB_3X1 0x00060000
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X)
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832x)
#define HRCWL_CEVCOD 0x000000C0
#define HRCWL_CEVCOD_SHIFT 6
#define HRCWL_CE_PLL_VCO_DIV_4 0x00000000
@ -478,7 +478,7 @@
#define HRCWL_SVCOD_DIV_8 0x20000000
#define HRCWL_SVCOD_DIV_1 0x30000000
#elif defined(CONFIG_MPC837X)
#elif defined(CONFIG_MPC837x)
#define HRCWL_SVCOD 0x30000000
#define HRCWL_SVCOD_SHIFT 28
#define HRCWL_SVCOD_DIV_4 0x00000000
@ -493,7 +493,7 @@
#define HRCWH_PCI_HOST_SHIFT 31
#define HRCWH_PCI_AGENT 0x00000000
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
#define HRCWH_32_BIT_PCI 0x00000000
#define HRCWH_64_BIT_PCI 0x40000000
#endif
@ -504,7 +504,7 @@
#define HRCWH_PCI_ARBITER_DISABLE 0x00000000
#define HRCWH_PCI_ARBITER_ENABLE 0x20000000
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
#define HRCWH_PCI2_ARBITER_DISABLE 0x00000000
#define HRCWH_PCI2_ARBITER_ENABLE 0x10000000
@ -528,17 +528,17 @@
#define HRCWH_ROM_LOC_DDR_SDRAM 0x00000000
#define HRCWH_ROM_LOC_PCI1 0x00100000
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
#define HRCWH_ROM_LOC_PCI2 0x00200000
#endif
#if defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC837x)
#define HRCWH_ROM_LOC_ON_CHIP_ROM 0x00300000
#endif
#define HRCWH_ROM_LOC_LOCAL_8BIT 0x00500000
#define HRCWH_ROM_LOC_LOCAL_16BIT 0x00600000
#define HRCWH_ROM_LOC_LOCAL_32BIT 0x00700000
#if defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
#define HRCWH_ROM_LOC_NAND_SP_8BIT 0x00100000
#define HRCWH_ROM_LOC_NAND_SP_16BIT 0x00200000
#define HRCWH_ROM_LOC_NAND_LP_8BIT 0x00500000
@ -562,7 +562,7 @@
#define HRCWH_TSEC2M_IN_SGMII 0x00001800
#endif
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
#define HRCWH_TSEC1M_IN_RGMII 0x00000000
#define HRCWH_TSEC1M_IN_RTBI 0x00004000
#define HRCWH_TSEC1M_IN_GMII 0x00008000
@ -589,7 +589,7 @@
/* RSR - Reset Status Register
*/
#if defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x)
#define RSR_RSTSRC 0xF0000000 /* Reset source */
#define RSR_RSTSRC_SHIFT 28
#else
@ -682,7 +682,7 @@
#define SCCR_PCICM 0x00010000
#define SCCR_PCICM_SHIFT 16
#if defined(CONFIG_MPC834X)
#if defined(CONFIG_MPC834x)
/* SCCR bits - MPC834x specific */
#define SCCR_TSEC1CM 0xc0000000
#define SCCR_TSEC1CM_SHIFT 30
@ -770,7 +770,7 @@
#define SCCR_TDMCM_2 0x00000020
#define SCCR_TDMCM_3 0x00000030
#elif defined(CONFIG_MPC837X)
#elif defined(CONFIG_MPC837x)
/* SCCR bits - MPC837x specific */
#define SCCR_TSEC1CM 0xc0000000
#define SCCR_TSEC1CM_SHIFT 30