83xx: initialize serdes for MPC837XRDB boards
On the MPC8377ERDB: 2 SATA and 2 PCI-E. On the MPC8378ERDB: 2 PCI-E On the MPC8379ERDB: 4 SATA Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
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@ -15,6 +15,7 @@
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#include <common.h>
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#include <i2c.h>
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#include <asm/io.h>
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#include <asm/fsl_serdes.h>
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#include <spd_sdram.h>
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#include <vsc7385.h>
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@ -132,6 +133,42 @@ int checkboard(void)
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return 0;
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}
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int board_early_init_f(void)
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{
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#ifdef CONFIG_FSL_SERDES
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immap_t *immr = (immap_t *)CFG_IMMR;
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u32 spridr = in_be32(&immr->sysconf.spridr);
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/* we check only part num, and don't look for CPU revisions */
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switch (spridr >> 16) {
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case SPR_8379E_REV10 >> 16:
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case SPR_8379_REV10 >> 16:
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fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
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FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
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fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
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FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
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break;
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case SPR_8378E_REV10 >> 16:
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case SPR_8378_REV10 >> 16:
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fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX,
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FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
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break;
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case SPR_8377E_REV10 >> 16:
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case SPR_8377_REV10 >> 16:
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fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
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FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
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fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
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FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
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break;
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default:
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printf("serdes not configured: unknown CPU part number: "
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"%04x\n", spridr >> 16);
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break;
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}
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#endif /* CONFIG_FSL_SERDES */
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return 0;
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}
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/*
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* Miscellaneous late-boot configurations
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*
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@ -32,6 +32,7 @@
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#define CONFIG_PCI 1
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MISC_INIT_R
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/*
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@ -323,6 +324,11 @@
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#define CFG_NS16550_COM1 (CFG_IMMR+0x4500)
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#define CFG_NS16550_COM2 (CFG_IMMR+0x4600)
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/* SERDES */
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#define CONFIG_FSL_SERDES
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#define CONFIG_FSL_SERDES1 0xe3000
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#define CONFIG_FSL_SERDES2 0xe3100
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/* Use the HUSH parser */
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#define CFG_HUSH_PARSER
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#ifdef CFG_HUSH_PARSER
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