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dm: mmc: sdhci: Refactor configuration setup to support DM

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Move the configuration setting into a separate function which can be used by
the driver-model code.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2016-06-12 23:30:27 -06:00
parent 9a46bd3feb
commit 2a809093f0
1 changed files with 59 additions and 48 deletions
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107
drivers/mmc/sdhci.c
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@ -9,6 +9,7 @@
*/
#include <common.h>
#include <errno.h>
#include <malloc.h>
#include <mmc.h>
#include <sdhci.h>
@ -479,13 +480,64 @@ static const struct mmc_ops sdhci_ops = {
.init = sdhci_init,
};
int sdhci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
uint caps, u32 max_clk, u32 min_clk, uint version,
uint quirks, uint host_caps)
{
cfg->name = name;
#ifndef CONFIG_DM_MMC_OPS
cfg->ops = &sdhci_ops;
#endif
if (max_clk)
cfg->f_max = max_clk;
else {
if (version >= SDHCI_SPEC_300)
cfg->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
SDHCI_CLOCK_BASE_SHIFT;
else
cfg->f_max = (caps & SDHCI_CLOCK_BASE_MASK) >>
SDHCI_CLOCK_BASE_SHIFT;
cfg->f_max *= 1000000;
}
if (cfg->f_max == 0)
return -EINVAL;
if (min_clk)
cfg->f_min = min_clk;
else {
if (version >= SDHCI_SPEC_300)
cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300;
else
cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_200;
}
cfg->voltages = 0;
if (caps & SDHCI_CAN_VDD_330)
cfg->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
if (caps & SDHCI_CAN_VDD_300)
cfg->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;
cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
if (version >= SDHCI_SPEC_300) {
if (caps & SDHCI_CAN_DO_8BIT)
cfg->host_caps |= MMC_MODE_8BIT;
}
if (quirks & SDHCI_QUIRK_NO_HISPD_BIT)
cfg->host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz);
if (host_caps)
cfg->host_caps |= host_caps;
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
return 0;
}
int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
{
unsigned int caps;
host->cfg.name = host->name;
host->cfg.ops = &sdhci_ops;
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
#ifdef CONFIG_MMC_SDMA
if (!(caps & SDHCI_CAN_DO_SDMA)) {
@ -495,58 +547,17 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
}
#endif
if (max_clk)
host->cfg.f_max = max_clk;
else {
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
host->cfg.f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK)
>> SDHCI_CLOCK_BASE_SHIFT;
else
host->cfg.f_max = (caps & SDHCI_CLOCK_BASE_MASK)
>> SDHCI_CLOCK_BASE_SHIFT;
host->cfg.f_max *= 1000000;
}
if (host->cfg.f_max == 0) {
if (sdhci_setup_cfg(&host->cfg, host->name, host->bus_width, caps,
max_clk, min_clk, SDHCI_GET_VERSION(host),
host->quirks, host->host_caps)) {
printf("%s: Hardware doesn't specify base clock frequency\n",
__func__);
return -1;
return -EINVAL;
}
if (min_clk)
host->cfg.f_min = min_clk;
else {
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
host->cfg.f_min = host->cfg.f_max /
SDHCI_MAX_DIV_SPEC_300;
else
host->cfg.f_min = host->cfg.f_max /
SDHCI_MAX_DIV_SPEC_200;
}
host->cfg.voltages = 0;
if (caps & SDHCI_CAN_VDD_330)
host->cfg.voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
if (caps & SDHCI_CAN_VDD_300)
host->cfg.voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
if (caps & SDHCI_CAN_VDD_180)
host->cfg.voltages |= MMC_VDD_165_195;
if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
host->cfg.voltages |= host->voltages;
host->cfg.host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
if (caps & SDHCI_CAN_DO_8BIT)
host->cfg.host_caps |= MMC_MODE_8BIT;
}
if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
host->cfg.host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz);
if (host->host_caps)
host->cfg.host_caps |= host->host_caps;
host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
sdhci_reset(host, SDHCI_RESET_ALL);
host->mmc = mmc_create(&host->cfg, host);