arm: pxa: mmc: add driver model support
Add driver model (DM) support. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
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@ -2,6 +2,9 @@
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/*
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
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*
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* Modified to add driver model (DM) support
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* Copyright (C) 2019 Marcel Ziswiler <marcel@ziswiler.com>
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*
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* Loosely based on the old code and Linux's PXA MMC driver
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*/
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@ -11,6 +14,8 @@
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <dm/platform_data/pxa_mmc_gen.h>
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#include <malloc.h>
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#include <mmc.h>
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@ -96,7 +101,7 @@ static int pxa_mmc_stop_clock(struct mmc *mmc)
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}
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static int pxa_mmc_start_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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uint32_t cmdat)
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uint32_t cmdat)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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struct pxa_mmc_regs *regs = priv->regs;
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@ -143,7 +148,7 @@ static int pxa_mmc_cmd_done(struct mmc *mmc, struct mmc_cmd *cmd)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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struct pxa_mmc_regs *regs = priv->regs;
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uint32_t a, b, c;
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u32 a, b, c;
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int i;
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int stat;
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@ -152,7 +157,7 @@ static int pxa_mmc_cmd_done(struct mmc *mmc, struct mmc_cmd *cmd)
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/*
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* Linux says:
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* Did I mention this is Sick. We always need to
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* Did I mention this is Sick. We always need to
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* discard the upper 8 bits of the first 16-bit word.
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*/
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a = readl(®s->res) & 0xffff;
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@ -164,13 +169,13 @@ static int pxa_mmc_cmd_done(struct mmc *mmc, struct mmc_cmd *cmd)
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}
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/* The command response didn't arrive */
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if (stat & MMC_STAT_TIME_OUT_RESPONSE)
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if (stat & MMC_STAT_TIME_OUT_RESPONSE) {
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return -ETIMEDOUT;
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else if (stat & MMC_STAT_RES_CRC_ERROR
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&& cmd->resp_type & MMC_RSP_CRC) {
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#ifdef PXAMMC_CRC_SKIP
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if (cmd->resp_type & MMC_RSP_136
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&& cmd->response[0] & (1 << 31))
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} else if (stat & MMC_STAT_RES_CRC_ERROR &&
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cmd->resp_type & MMC_RSP_CRC) {
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#ifdef PXAMMC_CRC_SKIP
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if (cmd->resp_type & MMC_RSP_136 &&
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cmd->response[0] & (1 << 31))
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printf("Ignoring CRC, this may be dangerous!\n");
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else
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#endif
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@ -185,8 +190,8 @@ static int pxa_mmc_do_read_xfer(struct mmc *mmc, struct mmc_data *data)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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struct pxa_mmc_regs *regs = priv->regs;
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uint32_t len;
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uint32_t *buf = (uint32_t *)data->dest;
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u32 len;
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u32 *buf = (uint32_t *)data->dest;
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int size;
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int ret;
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@ -202,7 +207,6 @@ static int pxa_mmc_do_read_xfer(struct mmc *mmc, struct mmc_data *data)
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/* Read data into the buffer */
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while (size--)
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*buf++ = readl(®s->rxfifo);
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}
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if (readl(®s->stat) & MMC_STAT_ERRORS)
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@ -221,8 +225,8 @@ static int pxa_mmc_do_write_xfer(struct mmc *mmc, struct mmc_data *data)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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struct pxa_mmc_regs *regs = priv->regs;
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uint32_t len;
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uint32_t *buf = (uint32_t *)data->src;
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u32 len;
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u32 *buf = (uint32_t *)data->src;
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int size;
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int ret;
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@ -259,12 +263,11 @@ static int pxa_mmc_do_write_xfer(struct mmc *mmc, struct mmc_data *data)
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return 0;
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}
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static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd,
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struct mmc_data *data)
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static int pxa_mmc_send_cmd_common(struct pxa_mmc_priv *priv, struct mmc *mmc,
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struct mmc_cmd *cmd, struct mmc_data *data)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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struct pxa_mmc_regs *regs = priv->regs;
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uint32_t cmdat = 0;
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u32 cmdat = 0;
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int ret;
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/* Stop the controller */
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@ -313,12 +316,11 @@ static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd,
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return 0;
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}
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static int pxa_mmc_set_ios(struct mmc *mmc)
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static int pxa_mmc_set_ios_common(struct pxa_mmc_priv *priv, struct mmc *mmc)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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struct pxa_mmc_regs *regs = priv->regs;
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uint32_t tmp;
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uint32_t pxa_mmc_clock;
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u32 tmp;
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u32 pxa_mmc_clock;
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if (!mmc->clock) {
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pxa_mmc_stop_clock(mmc);
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@ -346,9 +348,8 @@ static int pxa_mmc_set_ios(struct mmc *mmc)
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return 0;
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}
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static int pxa_mmc_init(struct mmc *mmc)
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static int pxa_mmc_init_common(struct pxa_mmc_priv *priv, struct mmc *mmc)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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struct pxa_mmc_regs *regs = priv->regs;
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/* Make sure the clock are stopped */
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@ -362,10 +363,34 @@ static int pxa_mmc_init(struct mmc *mmc)
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/* Mask all interrupts */
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writel(~(MMC_I_MASK_TXFIFO_WR_REQ | MMC_I_MASK_RXFIFO_RD_REQ),
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®s->i_mask);
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®s->i_mask);
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return 0;
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}
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#if !CONFIG_IS_ENABLED(DM_MMC)
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static int pxa_mmc_init(struct mmc *mmc)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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return pxa_mmc_init_common(priv, mmc);
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}
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static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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return pxa_mmc_send_cmd_common(priv, mmc, cmd, data);
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}
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static int pxa_mmc_set_ios(struct mmc *mmc)
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{
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struct pxa_mmc_priv *priv = mmc->priv;
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return pxa_mmc_set_ios_common(priv, mmc);
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}
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static const struct mmc_ops pxa_mmc_ops = {
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.send_cmd = pxa_mmc_request,
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.set_ios = pxa_mmc_set_ios,
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@ -386,7 +411,7 @@ int pxa_mmc_register(int card_index)
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{
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struct mmc *mmc;
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struct pxa_mmc_priv *priv;
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uint32_t reg;
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u32 reg;
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int ret = -ENOMEM;
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priv = malloc(sizeof(struct pxa_mmc_priv));
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@ -405,7 +430,7 @@ int pxa_mmc_register(int card_index)
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default:
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ret = -EINVAL;
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printf("PXA MMC: Invalid MMC controller ID (card_index = %d)\n",
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card_index);
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card_index);
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goto err1;
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}
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@ -420,7 +445,7 @@ int pxa_mmc_register(int card_index)
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#endif
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mmc = mmc_create(&pxa_mmc_cfg, priv);
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if (mmc == NULL)
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if (!mmc)
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goto err1;
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return 0;
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@ -430,3 +455,82 @@ err1:
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err0:
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return ret;
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}
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#else /* !CONFIG_IS_ENABLED(DM_MMC) */
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static int pxa_mmc_probe(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct pxa_mmc_plat *plat = dev_get_platdata(dev);
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struct mmc_config *cfg = &plat->cfg;
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struct mmc *mmc = &plat->mmc;
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struct pxa_mmc_priv *priv = dev_get_priv(dev);
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u32 reg;
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upriv->mmc = mmc;
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cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
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cfg->f_max = PXAMMC_MAX_SPEED;
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cfg->f_min = PXAMMC_MIN_SPEED;
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cfg->host_caps = PXAMMC_HOST_CAPS;
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cfg->name = dev->name;
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cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
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mmc->priv = priv;
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priv->regs = plat->base;
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#ifndef CONFIG_CPU_MONAHANS /* PXA2xx */
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reg = readl(CKEN);
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reg |= CKEN12_MMC;
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writel(reg, CKEN);
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#else /* PXA3xx */
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reg = readl(CKENA);
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reg |= CKENA_12_MMC0 | CKENA_13_MMC1;
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writel(reg, CKENA);
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#endif
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return pxa_mmc_init_common(priv, mmc);
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}
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static int pxa_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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struct pxa_mmc_plat *plat = dev_get_platdata(dev);
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struct pxa_mmc_priv *priv = dev_get_priv(dev);
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return pxa_mmc_send_cmd_common(priv, &plat->mmc, cmd, data);
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}
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static int pxa_mmc_set_ios(struct udevice *dev)
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{
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struct pxa_mmc_plat *plat = dev_get_platdata(dev);
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struct pxa_mmc_priv *priv = dev_get_priv(dev);
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return pxa_mmc_set_ios_common(priv, &plat->mmc);
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}
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static const struct dm_mmc_ops pxa_mmc_ops = {
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.get_cd = NULL,
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.send_cmd = pxa_mmc_send_cmd,
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.set_ios = pxa_mmc_set_ios,
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};
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#if CONFIG_IS_ENABLED(BLK)
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static int pxa_mmc_bind(struct udevice *dev)
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{
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struct pxa_mmc_plat *plat = dev_get_platdata(dev);
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return mmc_bind(dev, &plat->mmc, &plat->cfg);
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}
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#endif
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U_BOOT_DRIVER(pxa_mmc) = {
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#if CONFIG_IS_ENABLED(BLK)
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.bind = pxa_mmc_bind,
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#endif
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.id = UCLASS_MMC,
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.name = "pxa_mmc",
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.ops = &pxa_mmc_ops,
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.priv_auto_alloc_size = sizeof(struct pxa_mmc_priv),
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.probe = pxa_mmc_probe,
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};
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#endif /* !CONFIG_IS_ENABLED(DM_MMC) */
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include/dm/platform_data/pxa_mmc_gen.h
Normal file
22
include/dm/platform_data/pxa_mmc_gen.h
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@ -0,0 +1,22 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2019 Marcel Ziswiler <marcel.ziswiler@toradex.com>
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*/
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#ifndef __PXA_MMC_GEN_H
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#define __PXA_MMC_GEN_H
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#include <mmc.h>
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/*
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* struct pxa_mmc_platdata - information about a PXA MMC controller
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*
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* @base: MMC controller base register address
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*/
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struct pxa_mmc_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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struct pxa_mmc_regs *base;
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};
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#endif /* __PXA_MMC_GEN_H */
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