From 4c425570214cac091d9bdcf840b936062fb8da12 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:42 +0900 Subject: [PATCH 01/25] ARM: UniPhier: move SoC sources to mach-uniphier Move arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/* Signed-off-by: Masahiro Yamada --- MAINTAINERS | 2 +- arch/arm/Kconfig | 2 +- arch/arm/Makefile | 1 + arch/arm/cpu/armv7/Makefile | 1 - arch/arm/{cpu/armv7/uniphier => mach-uniphier}/Kconfig | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/Makefile | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/board_common.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/board_early_init_f.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/board_early_init_r.c | 0 .../arm/{cpu/armv7/uniphier => mach-uniphier}/board_late_init.c | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/cache_uniphier.c | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/cmd_ddrphy.c | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/cmd_pinmon.c | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/cpu_info.c | 0 .../arm/{cpu/armv7/uniphier => mach-uniphier}/ddrphy_training.c | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/dram_init.c | 0 .../arm/{cpu/armv7/uniphier => mach-uniphier}/init_page_table.S | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/lowlevel_init.S | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/Makefile | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/bcu_init.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/boot-mode.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/clkrst_init.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/ddrphy_init.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-ld4/lowlevel_debug.S | 0 .../arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/pinctrl.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/platdevice.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/pll_init.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-ld4/pll_spectrum.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/sbc_init.c | 0 .../arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/sg_init.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/umc_init.c | 0 .../arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/Makefile | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/boot-mode.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-pro4/clkrst_init.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-pro4/ddrphy_init.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-pro4/lowlevel_debug.S | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/pinctrl.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/platdevice.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/pll_init.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-pro4/pll_spectrum.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/sbc_init.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/sg_init.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/umc_init.c | 0 .../arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/Makefile | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/bcu_init.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/boot-mode.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-sld8/clkrst_init.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-sld8/ddrphy_init.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-sld8/lowlevel_debug.S | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/pinctrl.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/platdevice.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/pll_init.c | 0 .../armv7/uniphier => mach-uniphier}/ph1-sld8/pll_spectrum.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/sbc_init.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/sg_init.c | 0 .../{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/umc_init.c | 0 .../arm/{cpu/armv7/uniphier => mach-uniphier}/print_misc_info.c | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/reset.c | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/smp.S | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/spl.c | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/support_card.c | 0 arch/arm/{cpu/armv7/uniphier => mach-uniphier}/timer.c | 0 62 files changed, 3 insertions(+), 3 deletions(-) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/Kconfig (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/Makefile (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/board_common.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/board_early_init_f.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/board_early_init_r.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/board_late_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/cache_uniphier.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/cmd_ddrphy.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/cmd_pinmon.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/cpu_info.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ddrphy_training.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/dram_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/init_page_table.S (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/lowlevel_init.S (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/Makefile (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/bcu_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/boot-mode.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/clkrst_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/ddrphy_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/lowlevel_debug.S (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/pinctrl.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/platdevice.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/pll_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/pll_spectrum.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/sbc_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/sg_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-ld4/umc_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/Makefile (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/boot-mode.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/clkrst_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/ddrphy_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/lowlevel_debug.S (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/pinctrl.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/platdevice.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/pll_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/pll_spectrum.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/sbc_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/sg_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-pro4/umc_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/Makefile (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/bcu_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/boot-mode.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/clkrst_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/ddrphy_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/lowlevel_debug.S (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/pinctrl.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/platdevice.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/pll_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/pll_spectrum.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/sbc_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/sg_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/ph1-sld8/umc_init.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/print_misc_info.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/reset.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/smp.S (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/spl.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/support_card.c (100%) rename arch/arm/{cpu/armv7/uniphier => mach-uniphier}/timer.c (100%) diff --git a/MAINTAINERS b/MAINTAINERS index eef70d0f68..f9d1987289 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -162,7 +162,7 @@ ARM UNIPHIER M: Masahiro Yamada S: Maintained T: git git://git.denx.de/u-boot-uniphier.git -F: arch/arm/cpu/armv7/uniphier/ +F: arch/arm/mach-uniphier/ F: arch/arm/include/asm/arch-uniphier/ F: configs/ph1_*_defconfig N: uniphier diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7a2f91c48e..2265afb77c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -723,7 +723,7 @@ source "arch/arm/cpu/armv7/s5pc1xx/Kconfig" source "arch/arm/mach-tegra/Kconfig" -source "arch/arm/cpu/armv7/uniphier/Kconfig" +source "arch/arm/mach-uniphier/Kconfig" source "arch/arm/mach-versatile/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 878ae26ce4..08946de244 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -15,6 +15,7 @@ machine-$(CONFIG_ARCH_NOMADIK) += nomadik # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X machine-$(CONFIG_ORION5X) += orion5x machine-$(CONFIG_TEGRA) += tegra +machine-$(CONFIG_ARCH_UNIPHIER) += uniphier machine-$(CONFIG_ARCH_VERSATILE) += versatile machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index b228ed6a2e..ad22489e1a 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -56,6 +56,5 @@ obj-$(CONFIG_SOCFPGA) += socfpga/ obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_U8500) += u8500/ -obj-$(CONFIG_ARCH_UNIPHIER) += uniphier/ obj-$(CONFIG_VF610) += vf610/ obj-$(CONFIG_ZYNQ) += zynq/ diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig similarity index 100% rename from arch/arm/cpu/armv7/uniphier/Kconfig rename to arch/arm/mach-uniphier/Kconfig diff --git a/arch/arm/cpu/armv7/uniphier/Makefile b/arch/arm/mach-uniphier/Makefile similarity index 100% rename from arch/arm/cpu/armv7/uniphier/Makefile rename to arch/arm/mach-uniphier/Makefile diff --git a/arch/arm/cpu/armv7/uniphier/board_common.c b/arch/arm/mach-uniphier/board_common.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/board_common.c rename to arch/arm/mach-uniphier/board_common.c diff --git a/arch/arm/cpu/armv7/uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/board_early_init_f.c rename to arch/arm/mach-uniphier/board_early_init_f.c diff --git a/arch/arm/cpu/armv7/uniphier/board_early_init_r.c b/arch/arm/mach-uniphier/board_early_init_r.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/board_early_init_r.c rename to arch/arm/mach-uniphier/board_early_init_r.c diff --git a/arch/arm/cpu/armv7/uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/board_late_init.c rename to arch/arm/mach-uniphier/board_late_init.c diff --git a/arch/arm/cpu/armv7/uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/cache_uniphier.c rename to arch/arm/mach-uniphier/cache_uniphier.c diff --git a/arch/arm/cpu/armv7/uniphier/cmd_ddrphy.c b/arch/arm/mach-uniphier/cmd_ddrphy.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/cmd_ddrphy.c rename to arch/arm/mach-uniphier/cmd_ddrphy.c diff --git a/arch/arm/cpu/armv7/uniphier/cmd_pinmon.c b/arch/arm/mach-uniphier/cmd_pinmon.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/cmd_pinmon.c rename to arch/arm/mach-uniphier/cmd_pinmon.c diff --git a/arch/arm/cpu/armv7/uniphier/cpu_info.c b/arch/arm/mach-uniphier/cpu_info.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/cpu_info.c rename to arch/arm/mach-uniphier/cpu_info.c diff --git a/arch/arm/cpu/armv7/uniphier/ddrphy_training.c b/arch/arm/mach-uniphier/ddrphy_training.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ddrphy_training.c rename to arch/arm/mach-uniphier/ddrphy_training.c diff --git a/arch/arm/cpu/armv7/uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/dram_init.c rename to arch/arm/mach-uniphier/dram_init.c diff --git a/arch/arm/cpu/armv7/uniphier/init_page_table.S b/arch/arm/mach-uniphier/init_page_table.S similarity index 100% rename from arch/arm/cpu/armv7/uniphier/init_page_table.S rename to arch/arm/mach-uniphier/init_page_table.S diff --git a/arch/arm/cpu/armv7/uniphier/lowlevel_init.S b/arch/arm/mach-uniphier/lowlevel_init.S similarity index 100% rename from arch/arm/cpu/armv7/uniphier/lowlevel_init.S rename to arch/arm/mach-uniphier/lowlevel_init.S diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile rename to arch/arm/mach-uniphier/ph1-ld4/Makefile diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/bcu_init.c b/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/bcu_init.c rename to arch/arm/mach-uniphier/ph1-ld4/bcu_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/boot-mode.c b/arch/arm/mach-uniphier/ph1-ld4/boot-mode.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/boot-mode.c rename to arch/arm/mach-uniphier/ph1-ld4/boot-mode.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/clkrst_init.c rename to arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/ddrphy_init.c rename to arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S rename to arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/pinctrl.c rename to arch/arm/mach-uniphier/ph1-ld4/pinctrl.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c b/arch/arm/mach-uniphier/ph1-ld4/platdevice.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c rename to arch/arm/mach-uniphier/ph1-ld4/platdevice.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c b/arch/arm/mach-uniphier/ph1-ld4/pll_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_init.c rename to arch/arm/mach-uniphier/ph1-ld4/pll_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/pll_spectrum.c rename to arch/arm/mach-uniphier/ph1-ld4/pll_spectrum.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/sbc_init.c rename to arch/arm/mach-uniphier/ph1-ld4/sbc_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/sg_init.c b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/sg_init.c rename to arch/arm/mach-uniphier/ph1-ld4/sg_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c b/arch/arm/mach-uniphier/ph1-ld4/umc_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-ld4/umc_init.c rename to arch/arm/mach-uniphier/ph1-ld4/umc_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile rename to arch/arm/mach-uniphier/ph1-pro4/Makefile diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/boot-mode.c b/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/boot-mode.c rename to arch/arm/mach-uniphier/ph1-pro4/boot-mode.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/clkrst_init.c rename to arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/ddrphy_init.c rename to arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S rename to arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/pinctrl.c rename to arch/arm/mach-uniphier/ph1-pro4/pinctrl.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c b/arch/arm/mach-uniphier/ph1-pro4/platdevice.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c rename to arch/arm/mach-uniphier/ph1-pro4/platdevice.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_init.c rename to arch/arm/mach-uniphier/ph1-pro4/pll_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/pll_spectrum.c rename to arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c rename to arch/arm/mach-uniphier/ph1-pro4/sbc_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/sg_init.c rename to arch/arm/mach-uniphier/ph1-pro4/sg_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c b/arch/arm/mach-uniphier/ph1-pro4/umc_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-pro4/umc_init.c rename to arch/arm/mach-uniphier/ph1-pro4/umc_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile b/arch/arm/mach-uniphier/ph1-sld8/Makefile similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile rename to arch/arm/mach-uniphier/ph1-sld8/Makefile diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/bcu_init.c b/arch/arm/mach-uniphier/ph1-sld8/bcu_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/bcu_init.c rename to arch/arm/mach-uniphier/ph1-sld8/bcu_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/boot-mode.c b/arch/arm/mach-uniphier/ph1-sld8/boot-mode.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/boot-mode.c rename to arch/arm/mach-uniphier/ph1-sld8/boot-mode.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/clkrst_init.c rename to arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/ddrphy_init.c rename to arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S rename to arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/pinctrl.c rename to arch/arm/mach-uniphier/ph1-sld8/pinctrl.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c b/arch/arm/mach-uniphier/ph1-sld8/platdevice.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c rename to arch/arm/mach-uniphier/ph1-sld8/platdevice.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c b/arch/arm/mach-uniphier/ph1-sld8/pll_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_init.c rename to arch/arm/mach-uniphier/ph1-sld8/pll_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-sld8/pll_spectrum.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/pll_spectrum.c rename to arch/arm/mach-uniphier/ph1-sld8/pll_spectrum.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/sbc_init.c rename to arch/arm/mach-uniphier/ph1-sld8/sbc_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/sg_init.c b/arch/arm/mach-uniphier/ph1-sld8/sg_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/sg_init.c rename to arch/arm/mach-uniphier/ph1-sld8/sg_init.c diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c b/arch/arm/mach-uniphier/ph1-sld8/umc_init.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/ph1-sld8/umc_init.c rename to arch/arm/mach-uniphier/ph1-sld8/umc_init.c diff --git a/arch/arm/cpu/armv7/uniphier/print_misc_info.c b/arch/arm/mach-uniphier/print_misc_info.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/print_misc_info.c rename to arch/arm/mach-uniphier/print_misc_info.c diff --git a/arch/arm/cpu/armv7/uniphier/reset.c b/arch/arm/mach-uniphier/reset.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/reset.c rename to arch/arm/mach-uniphier/reset.c diff --git a/arch/arm/cpu/armv7/uniphier/smp.S b/arch/arm/mach-uniphier/smp.S similarity index 100% rename from arch/arm/cpu/armv7/uniphier/smp.S rename to arch/arm/mach-uniphier/smp.S diff --git a/arch/arm/cpu/armv7/uniphier/spl.c b/arch/arm/mach-uniphier/spl.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/spl.c rename to arch/arm/mach-uniphier/spl.c diff --git a/arch/arm/cpu/armv7/uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/support_card.c rename to arch/arm/mach-uniphier/support_card.c diff --git a/arch/arm/cpu/armv7/uniphier/timer.c b/arch/arm/mach-uniphier/timer.c similarity index 100% rename from arch/arm/cpu/armv7/uniphier/timer.c rename to arch/arm/mach-uniphier/timer.c From 9eb7acef97d1a892d59c5928001dd9516bb592de Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:43 +0900 Subject: [PATCH 02/25] ARM: UniPhier: move SoC headers to mach-uniphier/include/mach Move arch/arm/include/asm/arch-uniphier/* -> arch/arm/mach-uniphier/include/mach/* Signed-off-by: Masahiro Yamada --- MAINTAINERS | 1 - .../arch-uniphier => mach-uniphier/include/mach}/arm-mpcore.h | 0 .../asm/arch-uniphier => mach-uniphier/include/mach}/bcu-regs.h | 0 .../asm/arch-uniphier => mach-uniphier/include/mach}/board.h | 0 .../arch-uniphier => mach-uniphier/include/mach}/boot-device.h | 0 .../arch-uniphier => mach-uniphier/include/mach}/ddrphy-regs.h | 0 .../arch-uniphier => mach-uniphier/include/mach}/debug-uart.S | 0 .../arch-uniphier => mach-uniphier/include/mach}/ehci-uniphier.h | 0 .../asm/arch-uniphier => mach-uniphier/include/mach}/led.h | 0 .../asm/arch-uniphier => mach-uniphier/include/mach}/mio-regs.h | 0 .../arch-uniphier => mach-uniphier/include/mach}/platdevice.h | 0 .../asm/arch-uniphier => mach-uniphier/include/mach}/sbc-regs.h | 0 .../asm/arch-uniphier => mach-uniphier/include/mach}/sc-regs.h | 0 .../asm/arch-uniphier => mach-uniphier/include/mach}/sg-regs.h | 0 .../asm/arch-uniphier => mach-uniphier/include/mach}/ssc-regs.h | 0 .../asm/arch-uniphier => mach-uniphier/include/mach}/umc-regs.h | 0 16 files changed, 1 deletion(-) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/arm-mpcore.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/bcu-regs.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/board.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/boot-device.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/ddrphy-regs.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/debug-uart.S (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/ehci-uniphier.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/led.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/mio-regs.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/platdevice.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/sbc-regs.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/sc-regs.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/sg-regs.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/ssc-regs.h (100%) rename arch/arm/{include/asm/arch-uniphier => mach-uniphier/include/mach}/umc-regs.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index f9d1987289..5881b38499 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -163,7 +163,6 @@ M: Masahiro Yamada S: Maintained T: git git://git.denx.de/u-boot-uniphier.git F: arch/arm/mach-uniphier/ -F: arch/arm/include/asm/arch-uniphier/ F: configs/ph1_*_defconfig N: uniphier diff --git a/arch/arm/include/asm/arch-uniphier/arm-mpcore.h b/arch/arm/mach-uniphier/include/mach/arm-mpcore.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/arm-mpcore.h rename to arch/arm/mach-uniphier/include/mach/arm-mpcore.h diff --git a/arch/arm/include/asm/arch-uniphier/bcu-regs.h b/arch/arm/mach-uniphier/include/mach/bcu-regs.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/bcu-regs.h rename to arch/arm/mach-uniphier/include/mach/bcu-regs.h diff --git a/arch/arm/include/asm/arch-uniphier/board.h b/arch/arm/mach-uniphier/include/mach/board.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/board.h rename to arch/arm/mach-uniphier/include/mach/board.h diff --git a/arch/arm/include/asm/arch-uniphier/boot-device.h b/arch/arm/mach-uniphier/include/mach/boot-device.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/boot-device.h rename to arch/arm/mach-uniphier/include/mach/boot-device.h diff --git a/arch/arm/include/asm/arch-uniphier/ddrphy-regs.h b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/ddrphy-regs.h rename to arch/arm/mach-uniphier/include/mach/ddrphy-regs.h diff --git a/arch/arm/include/asm/arch-uniphier/debug-uart.S b/arch/arm/mach-uniphier/include/mach/debug-uart.S similarity index 100% rename from arch/arm/include/asm/arch-uniphier/debug-uart.S rename to arch/arm/mach-uniphier/include/mach/debug-uart.S diff --git a/arch/arm/include/asm/arch-uniphier/ehci-uniphier.h b/arch/arm/mach-uniphier/include/mach/ehci-uniphier.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/ehci-uniphier.h rename to arch/arm/mach-uniphier/include/mach/ehci-uniphier.h diff --git a/arch/arm/include/asm/arch-uniphier/led.h b/arch/arm/mach-uniphier/include/mach/led.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/led.h rename to arch/arm/mach-uniphier/include/mach/led.h diff --git a/arch/arm/include/asm/arch-uniphier/mio-regs.h b/arch/arm/mach-uniphier/include/mach/mio-regs.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/mio-regs.h rename to arch/arm/mach-uniphier/include/mach/mio-regs.h diff --git a/arch/arm/include/asm/arch-uniphier/platdevice.h b/arch/arm/mach-uniphier/include/mach/platdevice.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/platdevice.h rename to arch/arm/mach-uniphier/include/mach/platdevice.h diff --git a/arch/arm/include/asm/arch-uniphier/sbc-regs.h b/arch/arm/mach-uniphier/include/mach/sbc-regs.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/sbc-regs.h rename to arch/arm/mach-uniphier/include/mach/sbc-regs.h diff --git a/arch/arm/include/asm/arch-uniphier/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/sc-regs.h rename to arch/arm/mach-uniphier/include/mach/sc-regs.h diff --git a/arch/arm/include/asm/arch-uniphier/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/sg-regs.h rename to arch/arm/mach-uniphier/include/mach/sg-regs.h diff --git a/arch/arm/include/asm/arch-uniphier/ssc-regs.h b/arch/arm/mach-uniphier/include/mach/ssc-regs.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/ssc-regs.h rename to arch/arm/mach-uniphier/include/mach/ssc-regs.h diff --git a/arch/arm/include/asm/arch-uniphier/umc-regs.h b/arch/arm/mach-uniphier/include/mach/umc-regs.h similarity index 100% rename from arch/arm/include/asm/arch-uniphier/umc-regs.h rename to arch/arm/mach-uniphier/include/mach/umc-regs.h From a86ac9540e20c8e1d84342306b7dc1126222bae7 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:44 +0900 Subject: [PATCH 03/25] ARM: UniPhier: include instead of Since commit 0e7368c6c426 (kbuild: prepare for moving headers into mach-*/include/mach), we can replace #include with so we do not need to create the symbolic link during the build. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_common.c | 2 +- arch/arm/mach-uniphier/board_early_init_f.c | 4 ++-- arch/arm/mach-uniphier/board_early_init_r.c | 2 +- arch/arm/mach-uniphier/cache_uniphier.c | 2 +- arch/arm/mach-uniphier/cmd_ddrphy.c | 2 +- arch/arm/mach-uniphier/cmd_pinmon.c | 4 ++-- arch/arm/mach-uniphier/cpu_info.c | 2 +- arch/arm/mach-uniphier/ddrphy_training.c | 2 +- arch/arm/mach-uniphier/include/mach/platdevice.h | 2 +- arch/arm/mach-uniphier/lowlevel_init.S | 8 ++++---- arch/arm/mach-uniphier/ph1-ld4/bcu_init.c | 2 +- arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c | 2 +- arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c | 2 +- arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S | 4 ++-- arch/arm/mach-uniphier/ph1-ld4/pinctrl.c | 2 +- arch/arm/mach-uniphier/ph1-ld4/platdevice.c | 2 +- arch/arm/mach-uniphier/ph1-ld4/pll_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-ld4/sbc_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-ld4/sg_init.c | 2 +- arch/arm/mach-uniphier/ph1-ld4/umc_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-pro4/boot-mode.c | 6 +++--- arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c | 2 +- arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c | 2 +- arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S | 6 +++--- arch/arm/mach-uniphier/ph1-pro4/pinctrl.c | 2 +- arch/arm/mach-uniphier/ph1-pro4/platdevice.c | 2 +- arch/arm/mach-uniphier/ph1-pro4/pll_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c | 2 +- arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-pro4/sg_init.c | 2 +- arch/arm/mach-uniphier/ph1-pro4/umc_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c | 2 +- arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c | 2 +- arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S | 4 ++-- arch/arm/mach-uniphier/ph1-sld8/pinctrl.c | 2 +- arch/arm/mach-uniphier/ph1-sld8/platdevice.c | 2 +- arch/arm/mach-uniphier/ph1-sld8/pll_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-sld8/sbc_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-sld8/umc_init.c | 4 ++-- arch/arm/mach-uniphier/print_misc_info.c | 2 +- arch/arm/mach-uniphier/reset.c | 2 +- arch/arm/mach-uniphier/smp.S | 4 ++-- arch/arm/mach-uniphier/spl.c | 4 ++-- arch/arm/mach-uniphier/support_card.c | 4 ++-- arch/arm/mach-uniphier/timer.c | 2 +- drivers/usb/host/ehci-uniphier.c | 2 +- 46 files changed, 69 insertions(+), 69 deletions(-) diff --git a/arch/arm/mach-uniphier/board_common.c b/arch/arm/mach-uniphier/board_common.c index 3fb26c6d84..5f2d5f6f5b 100644 --- a/arch/arm/mach-uniphier/board_common.c +++ b/arch/arm/mach-uniphier/board_common.c @@ -6,7 +6,7 @@ */ #include -#include +#include /* * Routine: board_init diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index d25bbaec08..bf81345ab9 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -5,8 +5,8 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include -#include +#include +#include void pin_init(void); diff --git a/arch/arm/mach-uniphier/board_early_init_r.c b/arch/arm/mach-uniphier/board_early_init_r.c index cb7e04fc36..579fe70463 100644 --- a/arch/arm/mach-uniphier/board_early_init_r.c +++ b/arch/arm/mach-uniphier/board_early_init_r.c @@ -6,7 +6,7 @@ */ #include -#include +#include int board_early_init_r(void) { diff --git a/arch/arm/mach-uniphier/cache_uniphier.c b/arch/arm/mach-uniphier/cache_uniphier.c index e47f977fe5..52f3c7c7a6 100644 --- a/arch/arm/mach-uniphier/cache_uniphier.c +++ b/arch/arm/mach-uniphier/cache_uniphier.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #ifdef CONFIG_UNIPHIER_L2CACHE_ON static void uniphier_cache_maint_all(u32 operation) diff --git a/arch/arm/mach-uniphier/cmd_ddrphy.c b/arch/arm/mach-uniphier/cmd_ddrphy.c index 431d9010f1..5f44927b17 100644 --- a/arch/arm/mach-uniphier/cmd_ddrphy.c +++ b/arch/arm/mach-uniphier/cmd_ddrphy.c @@ -7,7 +7,7 @@ #include #include -#include +#include /* Select either decimal or hexadecimal */ #if 1 diff --git a/arch/arm/mach-uniphier/cmd_pinmon.c b/arch/arm/mach-uniphier/cmd_pinmon.c index 3c1b325976..8be2ed4fe6 100644 --- a/arch/arm/mach-uniphier/cmd_pinmon.c +++ b/arch/arm/mach-uniphier/cmd_pinmon.c @@ -6,8 +6,8 @@ */ #include -#include -#include +#include +#include static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { diff --git a/arch/arm/mach-uniphier/cpu_info.c b/arch/arm/mach-uniphier/cpu_info.c index 86d079ad56..13a0b1e48f 100644 --- a/arch/arm/mach-uniphier/cpu_info.c +++ b/arch/arm/mach-uniphier/cpu_info.c @@ -7,7 +7,7 @@ #include #include -#include +#include int print_cpuinfo(void) { diff --git a/arch/arm/mach-uniphier/ddrphy_training.c b/arch/arm/mach-uniphier/ddrphy_training.c index cc8b8ad648..b1d46cf627 100644 --- a/arch/arm/mach-uniphier/ddrphy_training.c +++ b/arch/arm/mach-uniphier/ddrphy_training.c @@ -7,7 +7,7 @@ #include #include -#include +#include void ddrphy_prepare_training(struct ddrphy __iomem *phy, int rank) { diff --git a/arch/arm/mach-uniphier/include/mach/platdevice.h b/arch/arm/mach-uniphier/include/mach/platdevice.h index 62a512659c..b004c2f328 100644 --- a/arch/arm/mach-uniphier/include/mach/platdevice.h +++ b/arch/arm/mach-uniphier/include/mach/platdevice.h @@ -21,6 +21,6 @@ U_BOOT_DEVICE(serial##n) = { \ .platdata = &serial_device##n \ }; -#include +#include #endif /* ARCH_PLATDEVICE_H */ diff --git a/arch/arm/mach-uniphier/lowlevel_init.S b/arch/arm/mach-uniphier/lowlevel_init.S index c208ab67a1..4b8b623b95 100644 --- a/arch/arm/mach-uniphier/lowlevel_init.S +++ b/arch/arm/mach-uniphier/lowlevel_init.S @@ -8,9 +8,9 @@ #include #include #include -#include -#include -#include +#include +#include +#include ENTRY(lowlevel_init) mov r8, lr @ persevere link reg across call @@ -122,7 +122,7 @@ ENTRY(enable_mmu) mov pc, lr ENDPROC(enable_mmu) -#include +#include #define BOOT_RAM_SIZE (SSC_WAY_SIZE) #define BOOT_WAY_BITS (0x00000100) /* way 8 */ diff --git a/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c b/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c index 85f37f299b..837e0d1fcc 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/bcu_init.c @@ -7,7 +7,7 @@ #include #include -#include +#include #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x)) diff --git a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c index 18965a94c5..6a9d144f82 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c @@ -7,7 +7,7 @@ #include #include -#include +#include void clkrst_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c index 60fc5ad6ea..a47e87a714 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/ddrphy_init.c @@ -6,7 +6,7 @@ #include #include -#include +#include void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) { diff --git a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S index c0778a0abb..7928c5c87c 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S @@ -8,10 +8,10 @@ */ #include -#include +#include #define UART_CLK 36864000 -#include +#include ENTRY(setup_lowlevel_debug) init_debug_uart r0, r1, r2 diff --git a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c index a7429402f3..15d81ebb3d 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-ld4/pinctrl.c @@ -6,7 +6,7 @@ #include #include -#include +#include void pin_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-ld4/platdevice.c b/arch/arm/mach-uniphier/ph1-ld4/platdevice.c index 9d51299308..5a3fbdcac0 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/platdevice.c +++ b/arch/arm/mach-uniphier/ph1-ld4/platdevice.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include #define UART_MASTER_CLK 36864000 diff --git a/arch/arm/mach-uniphier/ph1-ld4/pll_init.c b/arch/arm/mach-uniphier/ph1-ld4/pll_init.c index b83582fee7..985e14f4a9 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/pll_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/pll_init.c @@ -6,8 +6,8 @@ #include #include -#include -#include +#include +#include #undef DPLL_SSC_RATE_1PER diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c index 4839c943c7..f44195d2ca 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c @@ -7,8 +7,8 @@ #include #include -#include -#include +#include +#include void sbc_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-ld4/sg_init.c b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c index 2cc5df608f..e6bfa97c9f 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/sg_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c @@ -7,7 +7,7 @@ #include #include -#include +#include void sg_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-ld4/umc_init.c b/arch/arm/mach-uniphier/ph1-ld4/umc_init.c index bbc3dcb3da..081b028c0c 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/umc_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/umc_init.c @@ -6,8 +6,8 @@ #include #include -#include -#include +#include +#include static void umc_start_ssif(void __iomem *ssif_base) { diff --git a/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c b/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c index c31b74badd..9894c1a9c0 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c +++ b/arch/arm/mach-uniphier/ph1-pro4/boot-mode.c @@ -8,9 +8,9 @@ #include #include #include -#include -#include -#include +#include +#include +#include struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, diff --git a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c index 18965a94c5..6a9d144f82 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c @@ -7,7 +7,7 @@ #include #include -#include +#include void clkrst_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c index c5d1f606cf..7df5aea0f3 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/ddrphy_init.c @@ -6,7 +6,7 @@ #include #include -#include +#include void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) { diff --git a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S index a793b7c118..45aef7ad50 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S @@ -8,11 +8,11 @@ */ #include -#include -#include +#include +#include #define UART_CLK 73728000 -#include +#include ENTRY(setup_lowlevel_debug) ldr r0, =SC_CLKCTRL diff --git a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c index 4e3d47615b..c8c0267169 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c @@ -6,7 +6,7 @@ #include #include -#include +#include void pin_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-pro4/platdevice.c b/arch/arm/mach-uniphier/ph1-pro4/platdevice.c index 31ee2a2100..5fc5d387b4 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/platdevice.c +++ b/arch/arm/mach-uniphier/ph1-pro4/platdevice.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include #define UART_MASTER_CLK 73728000 diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c index 1db90f88a0..3d29548595 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c @@ -6,8 +6,8 @@ #include #include -#include -#include +#include +#include #undef DPLL_SSC_RATE_1PER diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c b/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c index 4538d1af44..ff9c73ff21 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c +++ b/arch/arm/mach-uniphier/ph1-pro4/pll_spectrum.c @@ -6,7 +6,7 @@ #include #include -#include +#include void enable_dpll_ssc(void) { diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c index 3c82a1aca4..37acfb5d55 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c @@ -7,8 +7,8 @@ #include #include -#include -#include +#include +#include void sbc_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-pro4/sg_init.c b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c index b7c4b10969..c25afa8e06 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/sg_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c @@ -7,7 +7,7 @@ #include #include -#include +#include void sg_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-pro4/umc_init.c b/arch/arm/mach-uniphier/ph1-pro4/umc_init.c index 2d1bde6f13..6cbb6b2473 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/umc_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/umc_init.c @@ -6,8 +6,8 @@ #include #include -#include -#include +#include +#include static void umc_start_ssif(void __iomem *ssif_base) { diff --git a/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c index 18965a94c5..6a9d144f82 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c @@ -7,7 +7,7 @@ #include #include -#include +#include void clkrst_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c b/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c index a5eafef9a8..304edfb482 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c +++ b/arch/arm/mach-uniphier/ph1-sld8/ddrphy_init.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include void ddrphy_init(struct ddrphy __iomem *phy, int freq, int size) { diff --git a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S index a413e5fd8a..73f0f63eba 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S @@ -8,10 +8,10 @@ */ #include -#include +#include #define UART_CLK 80000000 -#include +#include ENTRY(setup_lowlevel_debug) init_debug_uart r0, r1, r2 diff --git a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c index 5e80335b58..4c494ffa40 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-sld8/pinctrl.c @@ -6,7 +6,7 @@ #include #include -#include +#include void pin_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-sld8/platdevice.c b/arch/arm/mach-uniphier/ph1-sld8/platdevice.c index ea0691dd67..ee6d3e2d75 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/platdevice.c +++ b/arch/arm/mach-uniphier/ph1-sld8/platdevice.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include #define UART_MASTER_CLK 80000000 diff --git a/arch/arm/mach-uniphier/ph1-sld8/pll_init.c b/arch/arm/mach-uniphier/ph1-sld8/pll_init.c index 4b82700f44..885100747d 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/pll_init.c +++ b/arch/arm/mach-uniphier/ph1-sld8/pll_init.c @@ -6,8 +6,8 @@ #include #include -#include -#include +#include +#include static void dpll_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c index 5efee9c505..febd0e4341 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c @@ -7,8 +7,8 @@ #include #include -#include -#include +#include +#include void sbc_init(void) { diff --git a/arch/arm/mach-uniphier/ph1-sld8/umc_init.c b/arch/arm/mach-uniphier/ph1-sld8/umc_init.c index 2fbc73ab03..302611e5d2 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/umc_init.c +++ b/arch/arm/mach-uniphier/ph1-sld8/umc_init.c @@ -6,8 +6,8 @@ #include #include -#include -#include +#include +#include static void umc_start_ssif(void __iomem *ssif_base) { diff --git a/arch/arm/mach-uniphier/print_misc_info.c b/arch/arm/mach-uniphier/print_misc_info.c index 69cfab519f..22ea512285 100644 --- a/arch/arm/mach-uniphier/print_misc_info.c +++ b/arch/arm/mach-uniphier/print_misc_info.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include +#include int misc_init_f(void) { diff --git a/arch/arm/mach-uniphier/reset.c b/arch/arm/mach-uniphier/reset.c index 50d1fed647..005fbcf0b8 100644 --- a/arch/arm/mach-uniphier/reset.c +++ b/arch/arm/mach-uniphier/reset.c @@ -7,7 +7,7 @@ #include #include -#include +#include void reset_cpu(unsigned long ignored) { diff --git a/arch/arm/mach-uniphier/smp.S b/arch/arm/mach-uniphier/smp.S index 25ba981cea..18e3a9d21e 100644 --- a/arch/arm/mach-uniphier/smp.S +++ b/arch/arm/mach-uniphier/smp.S @@ -8,8 +8,8 @@ #include #include #include -#include -#include +#include +#include /* Entry point of U-Boot main program for the secondary CPU */ LENTRY(secondary_entry) diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index 8a4eafc266..5cdf69a517 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -8,8 +8,8 @@ #include #include #include -#include -#include +#include +#include void __weak bcu_init(void) { diff --git a/arch/arm/mach-uniphier/support_card.c b/arch/arm/mach-uniphier/support_card.c index 443224c451..e7b4158636 100644 --- a/arch/arm/mach-uniphier/support_card.c +++ b/arch/arm/mach-uniphier/support_card.c @@ -7,7 +7,7 @@ #include #include -#include +#include #if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) @@ -112,7 +112,7 @@ int board_eth_init(bd_t *bis) #if !defined(CONFIG_SYS_NO_FLASH) #include -#include +#include struct memory_bank { phys_addr_t base; diff --git a/arch/arm/mach-uniphier/timer.c b/arch/arm/mach-uniphier/timer.c index 6edc0842a9..adef08d2de 100644 --- a/arch/arm/mach-uniphier/timer.c +++ b/arch/arm/mach-uniphier/timer.c @@ -7,7 +7,7 @@ #include #include -#include +#include #define PERIPHCLK (50 * 1000 * 1000) /* 50 MHz */ #define PRESCALER ((PERIPHCLK) / (CONFIG_SYS_TIMER_RATE) - 1) diff --git a/drivers/usb/host/ehci-uniphier.c b/drivers/usb/host/ehci-uniphier.c index 32a4375279..42e2204d39 100644 --- a/drivers/usb/host/ehci-uniphier.c +++ b/drivers/usb/host/ehci-uniphier.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #include "ehci.h" #ifdef CONFIG_OF_CONTROL From c8bc166124c6afec9aee9b895b0ecc953312ac19 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:45 +0900 Subject: [PATCH 04/25] ARM: UniPhier: update defconfigs using savedefconfig Signed-off-by: Masahiro Yamada --- configs/ph1_ld4_defconfig | 18 +++++++++--------- configs/ph1_pro4_defconfig | 18 +++++++++--------- configs/ph1_sld8_defconfig | 18 +++++++++--------- 3 files changed, 27 insertions(+), 27 deletions(-) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index fa8d291ca1..edfdafa246 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -1,9 +1,13 @@ +CONFIG_ARM=y +CONFIG_ARCH_UNIPHIER=y +CONFIG_DM=y +CONFIG_DM_SERIAL=y +CONFIG_DM_I2C=y +CONFIG_MACH_PH1_LD4=y +CONFIG_DCC_MICRO_SUPPORT_CARD=y +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -+S:CONFIG_ARM=y -+S:CONFIG_ARCH_UNIPHIER=y -+S:CONFIG_MACH_PH1_LD4=y -+S:CONFIG_DCC_MICRO_SUPPORT_CARD=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BDI=y CONFIG_CMD_CONSOLE=y @@ -28,15 +32,11 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_NFS=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref" -CONFIG_DM=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 -CONFIG_DM_SERIAL=y +CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y -CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_SPL_NAND_DENALI=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index 12f069400f..f1fb7b7616 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -1,9 +1,13 @@ +CONFIG_ARM=y +CONFIG_ARCH_UNIPHIER=y +CONFIG_DM=y +CONFIG_DM_SERIAL=y +CONFIG_DM_I2C=y +CONFIG_MACH_PH1_PRO4=y +CONFIG_DCC_MICRO_SUPPORT_CARD=y +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -+S:CONFIG_ARM=y -+S:CONFIG_ARCH_UNIPHIER=y -+S:CONFIG_MACH_PH1_PRO4=y -+S:CONFIG_DCC_MICRO_SUPPORT_CARD=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BDI=y CONFIG_CMD_CONSOLE=y @@ -28,15 +32,11 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_NFS=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" -CONFIG_DM=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 -CONFIG_DM_SERIAL=y +CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y -CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_SPL_NAND_DENALI=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index e66d166566..0d437c66f4 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -1,9 +1,13 @@ +CONFIG_ARM=y +CONFIG_ARCH_UNIPHIER=y +CONFIG_DM=y +CONFIG_DM_SERIAL=y +CONFIG_DM_I2C=y +CONFIG_MACH_PH1_SLD8=y +CONFIG_DCC_MICRO_SUPPORT_CARD=y +CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -+S:CONFIG_ARM=y -+S:CONFIG_ARCH_UNIPHIER=y -+S:CONFIG_MACH_PH1_SLD8=y -+S:CONFIG_DCC_MICRO_SUPPORT_CARD=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BDI=y CONFIG_CMD_CONSOLE=y @@ -28,15 +32,11 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_NFS=y CONFIG_CMD_PING=y CONFIG_CMD_TIME=y -CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref" -CONFIG_DM=y CONFIG_NAND_DENALI=y CONFIG_SYS_NAND_DENALI_64BIT=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 -CONFIG_DM_SERIAL=y +CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y -CONFIG_DM_I2C=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_SPL_NAND_DENALI=y From d0c47b3ef7c582ec984edeba08984b0acc2ffcba Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:46 +0900 Subject: [PATCH 05/25] serial: UniPhier: use 32 bit register access For PH1-Pro4, the 8 bit write access to LCR register (offset = 0x11) is not working correctly. As a side effect, it also modifies MCR register (offset = 0x10) and results in unexpected behavior. Signed-off-by: Masahiro Yamada --- drivers/serial/serial_uniphier.c | 54 +++++++++++++++----------------- 1 file changed, 26 insertions(+), 28 deletions(-) diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c index e8a1608b99..327e0dc517 100644 --- a/drivers/serial/serial_uniphier.c +++ b/drivers/serial/serial_uniphier.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012-2014 Panasonic Corporation + * Copyright (C) 2012-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -13,31 +13,25 @@ #include #include -#define UART_REG(x) \ - u8 x; \ - u8 postpad_##x[3]; - /* * Note: Register map is slightly different from that of 16550. */ struct uniphier_serial { - UART_REG(rbr); /* 0x00 */ - UART_REG(ier); /* 0x04 */ - UART_REG(iir); /* 0x08 */ - UART_REG(fcr); /* 0x0c */ - u8 mcr; /* 0x10 */ - u8 lcr; - u16 __postpad; - UART_REG(lsr); /* 0x14 */ - UART_REG(msr); /* 0x18 */ - u32 __none1; - u32 __none2; - u16 dlr; - u16 __postpad2; + u32 rx; /* In: Receive buffer */ +#define tx rx /* Out: Transmit buffer */ + u32 ier; /* Interrupt Enable Register */ + u32 iir; /* In: Interrupt ID Register */ + u32 char_fcr; /* Charactor / FIFO Control Register */ + u32 lcr_mcr; /* Line/Modem Control Register */ +#define LCR_SHIFT 8 +#define LCR_MASK (0xff << (LCR_SHIFT)) + u32 lsr; /* In: Line Status Register */ + u32 msr; /* In: Modem Status Register */ + u32 __rsv0; + u32 __rsv1; + u32 dlr; /* Divisor Latch Register */ }; -#define thr rbr - struct uniphier_serial_private_data { struct uniphier_serial __iomem *membase; }; @@ -51,12 +45,16 @@ static int uniphier_serial_setbrg(struct udevice *dev, int baudrate) struct uniphier_serial __iomem *port = uniphier_serial_port(dev); const unsigned int mode_x_div = 16; unsigned int divisor; + u32 tmp; - writeb(UART_LCR_WLEN8, &port->lcr); + tmp = readl(&port->lcr_mcr); + tmp &= ~LCR_MASK; + tmp |= UART_LCR_WLEN8 << LCR_SHIFT; + writel(tmp, &port->lcr_mcr); divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate); - writew(divisor, &port->dlr); + writel(divisor, &port->dlr); return 0; } @@ -65,20 +63,20 @@ static int uniphier_serial_getc(struct udevice *dev) { struct uniphier_serial __iomem *port = uniphier_serial_port(dev); - if (!(readb(&port->lsr) & UART_LSR_DR)) + if (!(readl(&port->lsr) & UART_LSR_DR)) return -EAGAIN; - return readb(&port->rbr); + return readl(&port->rx); } static int uniphier_serial_putc(struct udevice *dev, const char c) { struct uniphier_serial __iomem *port = uniphier_serial_port(dev); - if (!(readb(&port->lsr) & UART_LSR_THRE)) + if (!(readl(&port->lsr) & UART_LSR_THRE)) return -EAGAIN; - writeb(c, &port->thr); + writel(c, &port->tx); return 0; } @@ -88,9 +86,9 @@ static int uniphier_serial_pending(struct udevice *dev, bool input) struct uniphier_serial __iomem *port = uniphier_serial_port(dev); if (input) - return readb(&port->lsr) & UART_LSR_DR; + return readl(&port->lsr) & UART_LSR_DR; else - return !(readb(&port->lsr) & UART_LSR_THRE); + return !(readl(&port->lsr) & UART_LSR_THRE); } static int uniphier_serial_probe(struct udevice *dev) From 099cf77c155ffd9aef7c3783c608d7574177bda9 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:47 +0900 Subject: [PATCH 06/25] serial: UniPhier: move LCR register setting to probe function We do not have to set the LCR register every time we change the baud-rate. We just need to set it up once in the probe function. Signed-off-by: Masahiro Yamada --- drivers/serial/serial_uniphier.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c index 327e0dc517..a6bd27facf 100644 --- a/drivers/serial/serial_uniphier.c +++ b/drivers/serial/serial_uniphier.c @@ -45,12 +45,6 @@ static int uniphier_serial_setbrg(struct udevice *dev, int baudrate) struct uniphier_serial __iomem *port = uniphier_serial_port(dev); const unsigned int mode_x_div = 16; unsigned int divisor; - u32 tmp; - - tmp = readl(&port->lcr_mcr); - tmp &= ~LCR_MASK; - tmp |= UART_LCR_WLEN8 << LCR_SHIFT; - writel(tmp, &port->lcr_mcr); divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate); @@ -93,14 +87,22 @@ static int uniphier_serial_pending(struct udevice *dev, bool input) static int uniphier_serial_probe(struct udevice *dev) { + u32 tmp; struct uniphier_serial_private_data *priv = dev_get_priv(dev); struct uniphier_serial_platform_data *plat = dev_get_platdata(dev); + struct uniphier_serial __iomem *port; - priv->membase = map_sysmem(plat->base, sizeof(struct uniphier_serial)); - - if (!priv->membase) + port = map_sysmem(plat->base, sizeof(struct uniphier_serial)); + if (!port) return -ENOMEM; + priv->membase = port; + + tmp = readl(&port->lcr_mcr); + tmp &= ~LCR_MASK; + tmp |= UART_LCR_WLEN8 << LCR_SHIFT; + writel(tmp, &port->lcr_mcr); + return 0; } From 1a745d27bde339b2491246d69aee9b9a3f39c692 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:48 +0900 Subject: [PATCH 07/25] ARM: UniPhier: fix comments in PH1-Pro4 SBC code Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c index 37acfb5d55..69405594b8 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -35,8 +35,8 @@ void sbc_init(void) /* * Boot Swap Off: boot from mask ROM * 0x00000000-0x01ffffff: mask ROM - * 0x02000000-0x3effffff: memory bank (31MB) - * 0x03f00000-0x3fffffff: peripherals (1MB) + * 0x02000000-0x03efffff: memory bank (31MB) + * 0x03f00000-0x03ffffff: peripherals (1MB) */ writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); From 27eac5df175be016a391cedf37cf5a076d279cf8 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:49 +0900 Subject: [PATCH 08/25] ARM: UniPhier: fix SBC init code Now UniPhier SoCs only work with CONFIG_SPL and the function sbc_init() is called from SPL. The conditional #if !defined(CONFIG_SPL_BUILD) has no point any more. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/ph1-ld4/sbc_init.c | 11 ++++----- arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | 10 ++++---- arch/arm/mach-uniphier/ph1-sld8/sbc_init.c | 28 +++++++++++----------- 3 files changed, 24 insertions(+), 25 deletions(-) diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c index f44195d2ca..374a8c0680 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -25,13 +25,12 @@ void sbc_init(void) writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); -#if !defined(CONFIG_SPL_BUILD) /* XECS0: boot/sub memory (boot swap = off/on) */ writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); -#endif + /* XECS3: peripherals */ writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); @@ -43,9 +42,9 @@ void sbc_init(void) writel(0x0400bc01, SBBASE1); writel(0x0800bf01, SBBASE3); -#if !defined(CONFIG_SPL_BUILD) /* enable access to sub memory when boot swap is on */ - sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */ -#endif + if (boot_is_swapped()) + sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */ + sg_set_pinsel(156, 1); /* PORT25 -> XECS3 */ } diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c index 69405594b8..4cc5e75724 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c @@ -42,13 +42,12 @@ void sbc_init(void) writel(0x0200be01, SBBASE1); } #elif defined(CONFIG_DCC_MICRO_SUPPORT_CARD) -#if !defined(CONFIG_SPL_BUILD) /* XECS0: boot/sub memory (boot swap = off/on) */ writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); -#endif + /* XECS1: sub/boot memory (boot swap = off/on) */ writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); @@ -65,9 +64,10 @@ void sbc_init(void) writel(0x0400bc01, SBBASE1); /* sub memory */ writel(0x0800bf01, SBBASE3); /* peripherals */ -#if !defined(CONFIG_SPL_BUILD) - sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */ -#endif + /* enable access to sub memory when boot swap is on */ + if (boot_is_swapped()) + sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */ + sg_set_pinsel(313, 5); /* PORT15 -> XECS3 */ writel(0x00000001, SG_LOADPINCTRL); diff --git a/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c index febd0e4341..fdef88e126 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -19,18 +19,18 @@ void sbc_init(void) tmp &= 0xfffffcff; writel(tmp, PC0CTRL); -#if !defined(CONFIG_SPL_BUILD) - /* XECS0 : dummy */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); -#endif - /* XECS1 : boot memory (always boot swap = on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); + /* + * SBCTRL0* does not need settings because PH1-sLD8 has no support for + * XECS0. The boot swap must be enabled to boot from the support card. + */ + + if (boot_is_swapped()) { + /* XECS1 : boot memory if boot swap is on */ + writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); + writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); + writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); + writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); + } /* XECS4 : sub memory */ writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL40); @@ -54,5 +54,5 @@ void sbc_init(void) sg_set_pinsel(135, 16); /* XIRQ7 -> XECS5 */ /* dummy read to assure write process */ - readl(SG_PINCTRL(33)); + readl(SG_PINCTRL(0)); } From f267b81e20da095539c7da7103afbd1e1b39b20b Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:50 +0900 Subject: [PATCH 09/25] ARM: UniPhier: rename SC_CLKCTRL_CLK_* to SC_SCLKCTRL_CEN_* Follow the register macros in the LSI specification book. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/include/mach/sc-regs.h | 12 ++++++------ arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c | 4 ++-- arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S | 2 +- arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c | 4 ++-- 5 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index 1197bb52d4..7726530f0b 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -47,12 +47,12 @@ #define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008) #define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) -#define SC_CLKCTRL_CLK_ETHER (0x1 << 12) -#define SC_CLKCTRL_CLK_MIO (0x1 << 11) -#define SC_CLKCTRL_CLK_UMC (0x1 << 4) -#define SC_CLKCTRL_CLK_NAND (0x1 << 2) -#define SC_CLKCTRL_CLK_SBC (0x1 << 1) -#define SC_CLKCTRL_CLK_PERI (0x1 << 0) +#define SC_CLKCTRL_CEN_ETHER (0x1 << 12) +#define SC_CLKCTRL_CEN_MIO (0x1 << 11) +#define SC_CLKCTRL_CEN_UMC (0x1 << 4) +#define SC_CLKCTRL_CEN_NAND (0x1 << 2) +#define SC_CLKCTRL_CEN_SBC (0x1 << 1) +#define SC_CLKCTRL_CEN_PERI (0x1 << 0) /* System reset control register */ #define SC_IRQTIMSET (SC_BASE_ADDR | 0x3000) diff --git a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c index 6a9d144f82..eaa45f94d3 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c @@ -22,8 +22,8 @@ void clkrst_init(void) /* privide clocks */ tmp = readl(SC_CLKCTRL); - tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC - | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI; + tmp |= SC_CLKCTRL_CEN_ETHER | SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_UMC + | SC_CLKCTRL_CEN_NAND | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; writel(tmp, SC_CLKCTRL); readl(SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c index 6a9d144f82..eaa45f94d3 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c @@ -22,8 +22,8 @@ void clkrst_init(void) /* privide clocks */ tmp = readl(SC_CLKCTRL); - tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC - | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI; + tmp |= SC_CLKCTRL_CEN_ETHER | SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_UMC + | SC_CLKCTRL_CEN_NAND | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; writel(tmp, SC_CLKCTRL); readl(SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S index 45aef7ad50..fcaf6d12d8 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S +++ b/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S @@ -17,7 +17,7 @@ ENTRY(setup_lowlevel_debug) ldr r0, =SC_CLKCTRL ldr r1, [r0] - orr r1, r1, #SC_CLKCTRL_CLK_PERI + orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] init_debug_uart r0, r1, r2 diff --git a/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c index 6a9d144f82..eaa45f94d3 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c @@ -22,8 +22,8 @@ void clkrst_init(void) /* privide clocks */ tmp = readl(SC_CLKCTRL); - tmp |= SC_CLKCTRL_CLK_ETHER | SC_CLKCTRL_CLK_MIO | SC_CLKCTRL_CLK_UMC - | SC_CLKCTRL_CLK_NAND | SC_CLKCTRL_CLK_SBC | SC_CLKCTRL_CLK_PERI; + tmp |= SC_CLKCTRL_CEN_ETHER | SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_UMC + | SC_CLKCTRL_CEN_NAND | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; writel(tmp, SC_CLKCTRL); readl(SC_CLKCTRL); /* dummy read */ } From 198a97a6abe7090109002baea0d2cb46070955aa Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:51 +0900 Subject: [PATCH 10/25] ARM: UniPhier: split clkrst_init() into two functions Split the current clkrst_init() into two functions: - early_clkrst_init(): called from SPL Deassert the reset signals of the memory controller and some other basic cores. - clkrst_init(): called from main U-boot Deassert the reset signals that are necessary for the access to peripherals etc. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_early_init_f.c | 5 ++++ arch/arm/mach-uniphier/ph1-ld4/Makefile | 4 +-- arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c | 22 ++++++++++---- .../mach-uniphier/ph1-ld4/early_clkrst_init.c | 1 + arch/arm/mach-uniphier/ph1-pro4/Makefile | 4 +-- arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c | 22 ++++++++++---- .../ph1-pro4/early_clkrst_init.c | 26 ++++++++++++++++ arch/arm/mach-uniphier/ph1-sld8/Makefile | 4 +-- arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c | 30 +------------------ .../ph1-sld8/early_clkrst_init.c | 1 + arch/arm/mach-uniphier/spl.c | 4 +-- 11 files changed, 74 insertions(+), 49 deletions(-) create mode 100644 arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c create mode 100644 arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c create mode 100644 arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index bf81345ab9..7108740408 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -9,6 +9,7 @@ #include void pin_init(void); +void clkrst_init(void); int board_early_init_f(void) { @@ -18,5 +19,9 @@ int board_early_init_f(void) led_write(U, 1, , ); + clkrst_init(); + + led_write(U, 2, , ); + return 0; } diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 72f46636fd..927640afd4 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -4,10 +4,10 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o -obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o clkrst_init.o \ +obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o else -obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o +obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o endif diff --git a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c index eaa45f94d3..f5fc418ef0 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c @@ -1,11 +1,10 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ -#include #include #include @@ -15,15 +14,26 @@ void clkrst_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); - tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1 - | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND; +#ifdef CONFIG_UNIPHIER_ETH + tmp |= SC_RSTCTRL_NRST_ETHER; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_RSTCTRL_NRST_NAND; +#endif writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ /* privide clocks */ tmp = readl(SC_CLKCTRL); - tmp |= SC_CLKCTRL_CEN_ETHER | SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_UMC - | SC_CLKCTRL_CEN_NAND | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; +#ifdef CONFIG_UNIPHIER_ETH + tmp |= SC_CLKCTRL_CEN_ETHER; +#endif +#ifdef CONFIG_USB_EHCI_UNIPHIER + tmp |= SC_CLKCTRL_CEN_MIO; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_CLKCTRL_CEN_NAND; +#endif writel(tmp, SC_CLKCTRL); readl(SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c new file mode 100644 index 0000000000..d7ef16b10a --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-ld4/early_clkrst_init.c @@ -0,0 +1 @@ +#include "../ph1-pro4/early_clkrst_init.c" diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index e330fda1ed..0390506e89 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -4,10 +4,10 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o -obj-y += sbc_init.o sg_init.o pll_init.o clkrst_init.o \ +obj-y += sbc_init.o sg_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o else -obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o +obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o endif diff --git a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c index eaa45f94d3..f5fc418ef0 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c @@ -1,11 +1,10 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ -#include #include #include @@ -15,15 +14,26 @@ void clkrst_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); - tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1 - | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND; +#ifdef CONFIG_UNIPHIER_ETH + tmp |= SC_RSTCTRL_NRST_ETHER; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_RSTCTRL_NRST_NAND; +#endif writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ /* privide clocks */ tmp = readl(SC_CLKCTRL); - tmp |= SC_CLKCTRL_CEN_ETHER | SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_UMC - | SC_CLKCTRL_CEN_NAND | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; +#ifdef CONFIG_UNIPHIER_ETH + tmp |= SC_CLKCTRL_CEN_ETHER; +#endif +#ifdef CONFIG_USB_EHCI_UNIPHIER + tmp |= SC_CLKCTRL_CEN_MIO; +#endif +#ifdef CONFIG_NAND_DENALI + tmp |= SC_CLKCTRL_CEN_NAND; +#endif writel(tmp, SC_CLKCTRL); readl(SC_CLKCTRL); /* dummy read */ } diff --git a/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c new file mode 100644 index 0000000000..ae4185fa90 --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +void early_clkrst_init(void) +{ + u32 tmp; + + /* deassert reset */ + tmp = readl(SC_RSTCTRL); + tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0; + writel(tmp, SC_RSTCTRL); + readl(SC_RSTCTRL); /* dummy read */ + + /* privide clocks */ + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_UMC | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + readl(SC_CLKCTRL); /* dummy read */ +} diff --git a/arch/arm/mach-uniphier/ph1-sld8/Makefile b/arch/arm/mach-uniphier/ph1-sld8/Makefile index 72f46636fd..927640afd4 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/Makefile +++ b/arch/arm/mach-uniphier/ph1-sld8/Makefile @@ -4,10 +4,10 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o -obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o clkrst_init.o \ +obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o else -obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o +obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o endif diff --git a/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c index eaa45f94d3..8d3435d632 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-sld8/clkrst_init.c @@ -1,29 +1 @@ -/* - * Copyright (C) 2011-2014 Panasonic Corporation - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -void clkrst_init(void) -{ - u32 tmp; - - /* deassert reset */ - tmp = readl(SC_RSTCTRL); - tmp |= SC_RSTCTRL_NRST_ETHER | SC_RSTCTRL_NRST_UMC1 - | SC_RSTCTRL_NRST_UMC0 | SC_RSTCTRL_NRST_NAND; - writel(tmp, SC_RSTCTRL); - readl(SC_RSTCTRL); /* dummy read */ - - /* privide clocks */ - tmp = readl(SC_CLKCTRL); - tmp |= SC_CLKCTRL_CEN_ETHER | SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_UMC - | SC_CLKCTRL_CEN_NAND | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; - writel(tmp, SC_CLKCTRL); - readl(SC_CLKCTRL); /* dummy read */ -} +#include "../ph1-ld4/clkrst_init.c" diff --git a/arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c new file mode 100644 index 0000000000..dd236b7e50 --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-sld8/early_clkrst_init.c @@ -0,0 +1 @@ +#include "../ph1-ld4/early_clkrst_init.c" diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index 5cdf69a517..c8a2469f6a 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -18,7 +18,7 @@ void sbc_init(void); void sg_init(void); void pll_init(void); void pin_init(void); -void clkrst_init(void); +void early_clkrst_init(void); int umc_init(void); void enable_dpll_ssc(void); @@ -38,7 +38,7 @@ void spl_board_init(void) led_write(L, 0, , ); - clkrst_init(); + early_clkrst_init(); led_write(L, 1, , ); From d3384bf77eb9a202d8218e1fe1da2f21af034aa7 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:52 +0900 Subject: [PATCH 11/25] ARM: UniPhier: reset NAND core in SPL for non-NAND boot mode For all the UniPhier SoCs so far, the reset signal of the NAND core is automatically deasserted after the PLL gets stabled. (The bit 2 of SC_RSTCTRL is default to one.) This causes a fatal problem on the NAND controller of PH1-LD4. For that SoC, the NAND I/O pins are not set up yet at the power-on reset except the NAND boot mode. As a result, the NAND controller begins automatic device scanning with wrong I/O pins and finally hangs up. Actually, U-Boot dies after printing "NAND:" on the console unless the boot mode latch detected the NAND boot mode. To work around this problem, reset the NAND core in SPL for non-NAND boot modes. If CONFIG_NAND_DENALI is enabled, the reset signal is deasserted again in U-Boot proper. At this time, I/O pins have been correctly set up, the device scanning should succeed. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c index ae4185fa90..37bb79e25a 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/early_clkrst_init.c @@ -5,6 +5,8 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include +#include #include #include @@ -14,7 +16,10 @@ void early_clkrst_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); + tmp |= SC_RSTCTRL_NRST_UMC1 | SC_RSTCTRL_NRST_UMC0; + if (spl_boot_device() != BOOT_DEVICE_NAND) + tmp &= ~SC_RSTCTRL_NRST_NAND; writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ From 42ca6982ff932b2f972bdaeb076ea4ce519a1117 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:53 +0900 Subject: [PATCH 12/25] ARM: UniPhier: enable STDMAC for EHCI Deassert the reset signal and provide the clock for STDMAC core. This is necessary for the USB 2.0 host controllers. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/include/mach/sc-regs.h | 2 ++ arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c | 5 ++++- arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c | 5 ++++- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index 7726530f0b..f0467bbde3 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -39,6 +39,7 @@ #define SC_RSTCTRL (SC_BASE_ADDR | 0x2000) #define SC_RSTCTRL_NRST_ETHER (0x1 << 12) +#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10) #define SC_RSTCTRL_NRST_UMC1 (0x1 << 5) #define SC_RSTCTRL_NRST_UMC0 (0x1 << 4) #define SC_RSTCTRL_NRST_NAND (0x1 << 2) @@ -49,6 +50,7 @@ #define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) #define SC_CLKCTRL_CEN_ETHER (0x1 << 12) #define SC_CLKCTRL_CEN_MIO (0x1 << 11) +#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10) #define SC_CLKCTRL_CEN_UMC (0x1 << 4) #define SC_CLKCTRL_CEN_NAND (0x1 << 2) #define SC_CLKCTRL_CEN_SBC (0x1 << 1) diff --git a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c index f5fc418ef0..4ac5411562 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c @@ -17,6 +17,9 @@ void clkrst_init(void) #ifdef CONFIG_UNIPHIER_ETH tmp |= SC_RSTCTRL_NRST_ETHER; #endif +#ifdef CONFIG_USB_EHCI_UNIPHIER + tmp |= SC_RSTCTRL_NRST_STDMAC; +#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif @@ -29,7 +32,7 @@ void clkrst_init(void) tmp |= SC_CLKCTRL_CEN_ETHER; #endif #ifdef CONFIG_USB_EHCI_UNIPHIER - tmp |= SC_CLKCTRL_CEN_MIO; + tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; #endif #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; diff --git a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c index f5fc418ef0..4ac5411562 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c @@ -17,6 +17,9 @@ void clkrst_init(void) #ifdef CONFIG_UNIPHIER_ETH tmp |= SC_RSTCTRL_NRST_ETHER; #endif +#ifdef CONFIG_USB_EHCI_UNIPHIER + tmp |= SC_RSTCTRL_NRST_STDMAC; +#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif @@ -29,7 +32,7 @@ void clkrst_init(void) tmp |= SC_CLKCTRL_CEN_ETHER; #endif #ifdef CONFIG_USB_EHCI_UNIPHIER - tmp |= SC_CLKCTRL_CEN_MIO; + tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; #endif #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; From 44f597adebb369ceb5921d4f18b73e415e83441f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:54 +0900 Subject: [PATCH 13/25] ARM: UniPhier: remove EHCI platform devices Now UniPhier platform highly depends on Device Tree configuration (CONFIG_OF_CONTROL is select'ed by Kconfig). Since the EHCI is only used on main U-Boot, we can drop platform devices of the EHCI controllers. We still keep UART platform devices because they might be useful for SPL. Signed-off-by: Masahiro Yamada Acked-by: Marek Vasut --- .../arm/mach-uniphier/include/mach/ehci-uniphier.h | 8 +------- arch/arm/mach-uniphier/include/mach/platdevice.h | 2 -- arch/arm/mach-uniphier/ph1-ld4/platdevice.c | 14 +------------- arch/arm/mach-uniphier/ph1-pro4/platdevice.c | 11 +---------- arch/arm/mach-uniphier/ph1-sld8/platdevice.c | 14 +------------- drivers/usb/host/Kconfig | 2 +- drivers/usb/host/ehci-uniphier.c | 14 +------------- 7 files changed, 6 insertions(+), 59 deletions(-) diff --git a/arch/arm/mach-uniphier/include/mach/ehci-uniphier.h b/arch/arm/mach-uniphier/include/mach/ehci-uniphier.h index e9c5fb4af8..3ba31833c3 100644 --- a/arch/arm/mach-uniphier/include/mach/ehci-uniphier.h +++ b/arch/arm/mach-uniphier/include/mach/ehci-uniphier.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2014-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -12,12 +12,6 @@ #include #include "mio-regs.h" -struct uniphier_ehci_platform_data { - unsigned long base; -}; - -extern struct uniphier_ehci_platform_data uniphier_ehci_platdata[]; - static inline void uniphier_ehci_reset(int index, int on) { u32 tmp; diff --git a/arch/arm/mach-uniphier/include/mach/platdevice.h b/arch/arm/mach-uniphier/include/mach/platdevice.h index b004c2f328..cdf7d132d4 100644 --- a/arch/arm/mach-uniphier/include/mach/platdevice.h +++ b/arch/arm/mach-uniphier/include/mach/platdevice.h @@ -21,6 +21,4 @@ U_BOOT_DEVICE(serial##n) = { \ .platdata = &serial_device##n \ }; -#include - #endif /* ARCH_PLATDEVICE_H */ diff --git a/arch/arm/mach-uniphier/ph1-ld4/platdevice.c b/arch/arm/mach-uniphier/ph1-ld4/platdevice.c index 5a3fbdcac0..c0e62943be 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/platdevice.c +++ b/arch/arm/mach-uniphier/ph1-ld4/platdevice.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2014-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -13,15 +13,3 @@ SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK) SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK) SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK) SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK) - -struct uniphier_ehci_platform_data uniphier_ehci_platdata[] = { - { - .base = 0x5a800100, - }, - { - .base = 0x5a810100, - }, - { - .base = 0x5a820100, - }, -}; diff --git a/arch/arm/mach-uniphier/ph1-pro4/platdevice.c b/arch/arm/mach-uniphier/ph1-pro4/platdevice.c index 5fc5d387b4..7440ceddff 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/platdevice.c +++ b/arch/arm/mach-uniphier/ph1-pro4/platdevice.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2014-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -13,12 +13,3 @@ SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK) SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK) SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK) SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK) - -struct uniphier_ehci_platform_data uniphier_ehci_platdata[] = { - { - .base = 0x5a800100, - }, - { - .base = 0x5a810100, - }, -}; diff --git a/arch/arm/mach-uniphier/ph1-sld8/platdevice.c b/arch/arm/mach-uniphier/ph1-sld8/platdevice.c index ee6d3e2d75..aa334a1ca4 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/platdevice.c +++ b/arch/arm/mach-uniphier/ph1-sld8/platdevice.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2014-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -13,15 +13,3 @@ SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK) SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK) SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK) SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK) - -struct uniphier_ehci_platform_data uniphier_ehci_platdata[] = { - { - .base = 0x5a800100, - }, - { - .base = 0x5a810100, - }, - { - .base = 0x5a820100, - }, -}; diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 30d1457638..0e005c2a1f 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -47,7 +47,7 @@ if USB_EHCI_HCD config USB_EHCI_UNIPHIER bool "Support for Panasonic UniPhier on-chip EHCI USB controller" - depends on ARCH_UNIPHIER + depends on ARCH_UNIPHIER && OF_CONTROL default y ---help--- Enables support for the on-chip EHCI controller on Panasonic diff --git a/drivers/usb/host/ehci-uniphier.c b/drivers/usb/host/ehci-uniphier.c index 42e2204d39..68959efb20 100644 --- a/drivers/usb/host/ehci-uniphier.c +++ b/drivers/usb/host/ehci-uniphier.c @@ -9,10 +9,9 @@ #include #include #include +#include #include "ehci.h" -#ifdef CONFIG_OF_CONTROL -#include DECLARE_GLOBAL_DATA_PTR; #define FDT gd->fdt_blob @@ -35,18 +34,7 @@ static int get_uniphier_ehci_base(int index, struct ehci_hccr **base) return -ENODEV; /* not found */ } -#else -static int get_uniphier_ehci_base(int index, struct ehci_hccr **base) -{ - *base = (struct ehci_hccr *)uniphier_ehci_platdata[index].base; - return 0; -} -#endif -/* - * Create the appropriate control structures to manage - * a new EHCI host controller. - */ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { From 4c7d025368fce4825a23aee90bd9a8fa1a95bbd7 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:55 +0900 Subject: [PATCH 14/25] ARM: UniPhier: move uniphier_ehci_reset() function Because uniphier_ehci_reset() is only called from ehci-uniphier.c, it can be a static function there. Signed-off-by: Masahiro Yamada Acked-by: Marek Vasut --- .../include/mach/ehci-uniphier.h | 27 ------------------- drivers/usb/host/ehci-uniphier.c | 15 ++++++++++- 2 files changed, 14 insertions(+), 28 deletions(-) delete mode 100644 arch/arm/mach-uniphier/include/mach/ehci-uniphier.h diff --git a/arch/arm/mach-uniphier/include/mach/ehci-uniphier.h b/arch/arm/mach-uniphier/include/mach/ehci-uniphier.h deleted file mode 100644 index 3ba31833c3..0000000000 --- a/arch/arm/mach-uniphier/include/mach/ehci-uniphier.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (C) 2014-2015 Panasonic Corporation - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __PLAT_UNIPHIER_EHCI_H -#define __PLAT_UNIPHIER_EHCI_H - -#include -#include -#include "mio-regs.h" - -static inline void uniphier_ehci_reset(int index, int on) -{ - u32 tmp; - - tmp = readl(MIO_USB_RSTCTRL(index)); - if (on) - tmp &= ~MIO_USB_RSTCTRL_XRST; - else - tmp |= MIO_USB_RSTCTRL_XRST; - writel(tmp, MIO_USB_RSTCTRL(index)); -} - -#endif /* __PLAT_UNIPHIER_EHCI_H */ diff --git a/drivers/usb/host/ehci-uniphier.c b/drivers/usb/host/ehci-uniphier.c index 68959efb20..b5ec296918 100644 --- a/drivers/usb/host/ehci-uniphier.c +++ b/drivers/usb/host/ehci-uniphier.c @@ -7,8 +7,9 @@ #include #include +#include #include -#include +#include #include #include "ehci.h" @@ -35,6 +36,18 @@ static int get_uniphier_ehci_base(int index, struct ehci_hccr **base) return -ENODEV; /* not found */ } +static void uniphier_ehci_reset(int index, int on) +{ + u32 tmp; + + tmp = readl(MIO_USB_RSTCTRL(index)); + if (on) + tmp &= ~MIO_USB_RSTCTRL_XRST; + else + tmp |= MIO_USB_RSTCTRL_XRST; + writel(tmp, MIO_USB_RSTCTRL(index)); +} + int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { From 64d851bf1d9a94622587c4b6e8d6bd07ddb02ef7 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:56 +0900 Subject: [PATCH 15/25] ARM: UniPhier: replace "usb-ehci" with "generic-ehci" EHCI host controllers have a common register interface. We may wish to implement a generic EHCI driver someday. Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ph1-ld4.dtsi | 8 ++++---- arch/arm/dts/uniphier-ph1-pro4.dtsi | 6 +++--- arch/arm/dts/uniphier-ph1-sld3.dtsi | 10 +++++----- arch/arm/dts/uniphier-ph1-sld8.dtsi | 8 ++++---- 4 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi index 2a3dd73ead..8ed7bbf53c 100644 --- a/arch/arm/dts/uniphier-ph1-ld4.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Source for UniPhier PH1-LD4 SoC * - * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2014-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -94,19 +94,19 @@ }; usb0: usb@5a800100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a800100 0x100>; }; usb1: usb@5a810100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a810100 0x100>; }; usb2: usb@5a820100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a820100 0x100>; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi index 49e375e8d2..3f1001b72f 100644 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Source for UniPhier PH1-Pro4 SoC * - * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2014-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -120,13 +120,13 @@ }; usb0: usb@5a800100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a800100 0x100>; }; usb1: usb@5a810100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a810100 0x100>; }; diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi index f5529d2e6e..88322c6a8c 100644 --- a/arch/arm/dts/uniphier-ph1-sld3.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Source for UniPhier PH1-sLD3 SoC * - * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2014-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -93,25 +93,25 @@ }; usb0: usb@5a800100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a800100 0x100>; }; usb1: usb@5a810100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a810100 0x100>; }; usb2: usb@5a820100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a820100 0x100>; }; usb3: usb@5a830100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a830100 0x100>; }; diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi index 0ea76e59fc..1b3eb228c8 100644 --- a/arch/arm/dts/uniphier-ph1-sld8.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Source for UniPhier PH1-sLD8 SoC * - * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2014-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -94,19 +94,19 @@ }; usb0: usb@5a800100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a800100 0x100>; }; usb1: usb@5a810100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a810100 0x100>; }; usb2: usb@5a820100 { - compatible = "panasonic,uniphier-ehci", "usb-ehci"; + compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a820100 0x100>; }; From bdcf5a4c14200abf4e693c9b5c60ea495a2d1cef Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:57 +0900 Subject: [PATCH 16/25] ARM: UniPhier: add I/O pin settings for xHCI on PH1-Pro4 This is necessary to use the xHCI cores for PH1-Pro4. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/ph1-pro4/pinctrl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c index c8c0267169..f382ef4842 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c +++ b/arch/arm/mach-uniphier/ph1-pro4/pinctrl.c @@ -41,6 +41,13 @@ void pin_init(void) sg_set_pinsel(54, 0); /* NRYBY0 -> NRYBY0 */ #endif +#ifdef CONFIG_USB_XHCI_UNIPHIER + sg_set_pinsel(180, 0); /* USB0VBUS -> USB0VBUS */ + sg_set_pinsel(181, 0); /* USB0OD -> USB0OD */ + sg_set_pinsel(182, 0); /* USB1VBUS -> USB1VBUS */ + sg_set_pinsel(183, 0); /* USB1OD -> USB1OD */ +#endif + #ifdef CONFIG_USB_EHCI_UNIPHIER sg_set_pinsel(184, 0); /* USB2VBUS -> USB2VBUS */ sg_set_pinsel(185, 0); /* USB2OD -> USB2OD */ From 1535163a4e2dbc9c4a9b5c4b05cb8987f526885f Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:58 +0900 Subject: [PATCH 17/25] ARM: UniPhier: enable xHCI and GIO cores for PH1-Pro4 This is necessary to use the USB 3.0 host controllers on PH1-Pro4. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/include/mach/sc-regs.h | 11 ++++++++++- arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c | 15 +++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index f0467bbde3..caec6c2574 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -1,7 +1,7 @@ /* * UniPhier SC (System Control) block registers * - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * * SPDX-License-Identifier: GPL-2.0+ */ @@ -38,19 +38,28 @@ #define SC_VPLL27BCTRL3 (SC_BASE_ADDR | 0x1298) #define SC_RSTCTRL (SC_BASE_ADDR | 0x2000) +#define SC_RSTCTRL_NRST_USB3B0 (0x1 << 17) /* USB3 #0 bus */ +#define SC_RSTCTRL_NRST_USB3C0 (0x1 << 16) /* USB3 #0 core */ #define SC_RSTCTRL_NRST_ETHER (0x1 << 12) #define SC_RSTCTRL_NRST_STDMAC (0x1 << 10) +#define SC_RSTCTRL_NRST_GIO (0x1 << 6) #define SC_RSTCTRL_NRST_UMC1 (0x1 << 5) #define SC_RSTCTRL_NRST_UMC0 (0x1 << 4) #define SC_RSTCTRL_NRST_NAND (0x1 << 2) #define SC_RSTCTRL2 (SC_BASE_ADDR | 0x2004) +#define SC_RSTCTRL2_NRST_USB3B1 (0x1 << 17) /* USB3 #1 bus */ +#define SC_RSTCTRL2_NRST_USB3C1 (0x1 << 16) /* USB3 #1 core */ + #define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008) #define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) +#define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */ +#define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */ #define SC_CLKCTRL_CEN_ETHER (0x1 << 12) #define SC_CLKCTRL_CEN_MIO (0x1 << 11) #define SC_CLKCTRL_CEN_STDMAC (0x1 << 10) +#define SC_CLKCTRL_CEN_GIO (0x1 << 6) #define SC_CLKCTRL_CEN_UMC (0x1 << 4) #define SC_CLKCTRL_CEN_NAND (0x1 << 2) #define SC_CLKCTRL_CEN_SBC (0x1 << 1) diff --git a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c index 4ac5411562..054efa6537 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c @@ -14,6 +14,10 @@ void clkrst_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); +#ifdef CONFIG_USB_XHCI_UNIPHIER + tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 | + SC_RSTCTRL_NRST_GIO; +#endif #ifdef CONFIG_UNIPHIER_ETH tmp |= SC_RSTCTRL_NRST_ETHER; #endif @@ -26,8 +30,19 @@ void clkrst_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ +#ifdef CONFIG_USB_XHCI_UNIPHIER + tmp = readl(SC_RSTCTRL2); + tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1; + writel(tmp, SC_RSTCTRL2); + readl(SC_RSTCTRL2); /* dummy read */ +#endif + /* privide clocks */ tmp = readl(SC_CLKCTRL); +#ifdef CONFIG_USB_XHCI_UNIPHIER + tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | + SC_CLKCTRL_CEN_GIO; +#endif #ifdef CONFIG_UNIPHIER_ETH tmp |= SC_CLKCTRL_CEN_ETHER; #endif From de01a768f079ddfdf3c0fa6372658972081e916c Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:26:59 +0900 Subject: [PATCH 18/25] ARM: UniPhier: add xHCI device nodes to PH1-Pro4 device tree Each USB port corresponds to the following IP core: port0: xHCI (0x65a00000) SS+HS port1: xHCI (0x65c00000) HS (SS PHY is not implemented) port2: EHCI (0x5a800100) HS port3: EHCI (0x5a810100) HS Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ph1-pro4-ref.dts | 5 +---- arch/arm/dts/uniphier-ph1-pro4.dtsi | 16 ++++++++++++++-- 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts index d9e7a8c52b..5bec92b8f3 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts @@ -36,6 +36,7 @@ i2c3 = &i2c3; i2c5 = &i2c5; i2c6 = &i2c6; + usb0 = &usb0; }; }; @@ -54,7 +55,3 @@ &usb0 { status = "okay"; }; - -&usb1 { - status = "okay"; -}; diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi index 3f1001b72f..1247779ab0 100644 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi @@ -119,18 +119,30 @@ status = "ok"; }; - usb0: usb@5a800100 { + usb2: usb@5a800100 { compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a800100 0x100>; }; - usb1: usb@5a810100 { + usb3: usb@5a810100 { compatible = "panasonic,uniphier-ehci", "generic-ehci"; status = "disabled"; reg = <0x5a810100 0x100>; }; + usb0: usb@65a00000 { + compatible = "panasonic,uniphier-xhci", "generic-xhci"; + status = "disabled"; + reg = <0x65a00000 0x100>; + }; + + usb1: usb@65c00000 { + compatible = "panasonic,uniphier-xhci", "generic-xhci"; + status = "disabled"; + reg = <0x65c00000 0x100>; + }; + nand: nand@68000000 { compatible = "denali,denali-nand-dt"; reg = <0x68000000 0x20>, <0x68100000 0x1000>; From 1e7df7c4e4a1ad12b764c55369c313c1731dc4e8 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:27:00 +0900 Subject: [PATCH 19/25] usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada Acked-by: Marek Vasut --- doc/README.uniphier | 3 +- drivers/usb/host/Kconfig | 8 +++ drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-uniphier.c | 85 ++++++++++++++++++++++++++++++++ include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 6 files changed, 98 insertions(+), 1 deletion(-) create mode 100644 drivers/usb/host/xhci-uniphier.c diff --git a/doc/README.uniphier b/doc/README.uniphier index aaeb50c4e6..4902533544 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -73,7 +73,8 @@ Supported devices - UART (on-chip) - NAND - - USB (2.0) + - USB 2.0 (EHCI) + - USB 3.0 (xHCI) - LAN (on-board SMSC9118) - I2C - EEPROM (connected to the on-board I2C bus) diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 0e005c2a1f..24a595fb42 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -17,6 +17,14 @@ config USB_XHCI if USB_XHCI_HCD +config USB_XHCI_UNIPHIER + bool "Support for Panasonic UniPhier on-chip xHCI USB controller" + depends on ARCH_UNIPHIER + default y + ---help--- + Enables support for the on-chip xHCI controller on Panasonic + UniPhier SoCs. + endif config USB_EHCI_HCD diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 66d6e9a6d2..eb6f34b53c 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -48,6 +48,7 @@ obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o +obj-$(CONFIG_USB_XHCI_UNIPHIER) += xhci-uniphier.o # designware obj-$(CONFIG_USB_DWC2) += dwc2.o diff --git a/drivers/usb/host/xhci-uniphier.c b/drivers/usb/host/xhci-uniphier.c new file mode 100644 index 0000000000..08b15e0ad1 --- /dev/null +++ b/drivers/usb/host/xhci-uniphier.c @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2015 Panasonic Corporation + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include "xhci.h" + +static int get_uniphier_xhci_base(int index, struct xhci_hccr **base) +{ + DECLARE_GLOBAL_DATA_PTR; + int node_list[2]; + fdt_addr_t addr; + int count; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "usb", + COMPAT_PANASONIC_XHCI, node_list, + ARRAY_SIZE(node_list)); + + if (index >= count) + return -ENODEV; + + addr = fdtdec_get_addr(gd->fdt_blob, node_list[index], "reg"); + if (addr == FDT_ADDR_T_NONE) + return -ENODEV; + + *base = (struct xhci_hccr *)addr; + + return 0; +} + +#define USB3_RST_CTRL 0x00100040 +#define IOMMU_RST_N (1 << 5) +#define LINK_RST_N (1 << 4) + +static void uniphier_xhci_reset(void __iomem *base, int on) +{ + u32 tmp; + + tmp = readl(base + USB3_RST_CTRL); + + if (on) + tmp &= ~(IOMMU_RST_N | LINK_RST_N); + else + tmp |= IOMMU_RST_N | LINK_RST_N; + + writel(tmp, base + USB3_RST_CTRL); +} + +int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) +{ + int ret; + struct xhci_hccr *cr; + struct xhci_hcor *or; + + ret = get_uniphier_xhci_base(index, &cr); + if (ret < 0) + return ret; + + uniphier_xhci_reset(cr, 0); + + or = (void *)cr + HC_LENGTH(xhci_readl(&cr->cr_capbase)); + + *hccr = cr; + *hcor = or; + + return 0; +} + +void xhci_hcd_stop(int index) +{ + int ret; + struct xhci_hccr *cr; + + ret = get_uniphier_xhci_base(index, &cr); + if (ret < 0) + return; + + uniphier_xhci_reset(cr, 1); +} diff --git a/include/fdtdec.h b/include/fdtdec.h index 1bc70dba21..1233dfb280 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -168,6 +168,7 @@ enum fdt_compat_id { COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */ COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */ COMPAT_INTEL_QRK_MRC, /* Intel Quark MRC */ + COMPAT_PANASONIC_XHCI, /* Panasonic UniPhier xHCI */ COMPAT_COUNT, }; diff --git a/lib/fdtdec.c b/lib/fdtdec.c index dd58bbb482..21933e4a47 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -76,6 +76,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(AMS_AS3722, "ams,as3722"), COMPAT(INTEL_ICH_SPI, "intel,ich-spi"), COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"), + COMPAT(PANASONIC_XHCI, "panasonic,uniphier-xhci"), }; const char *fdtdec_get_compatible(enum fdt_compat_id id) From 53c45d4e1ec90cf12e6817992c303187afc16123 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:27:01 +0900 Subject: [PATCH 20/25] ARM: UniPhier: switch to xHCI for PH1-Pro4 PH1-Pro4 includes both EHCI and xHCI IP cores. Unfortunately, U-Boot cannot enable EHCI and xHCI support simultaneously. Some users may wish Super-Speed connection. Disable CONFIG_USB_EHCI_HCD and enable CONFIG_USB_XHCI_HCD. Signed-off-by: Masahiro Yamada --- configs/ph1_pro4_defconfig | 2 +- include/configs/uniphier.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index f1fb7b7616..ace5fc5014 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -38,5 +38,5 @@ CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_SPL_NAND_DENALI=y CONFIG_UNIPHIER_SERIAL=y CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y +CONFIG_USB_XHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 3f738fb642..df89d14cc3 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -88,6 +88,8 @@ /* #define CONFIG_SYS_ICACHE_OFF */ /* #define CONFIG_SYS_DCACHE_OFF */ +#define CONFIG_SYS_CACHELINE_SIZE 32 + /* Comment out the following to enable L2 cache */ #define CONFIG_UNIPHIER_L2CACHE_ON @@ -186,6 +188,7 @@ /* USB */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4 #define CONFIG_CMD_FAT #define CONFIG_FAT_WRITE #define CONFIG_DOS_PARTITION From ea6de4ac806f7e81960f642dacbaa9c53b30e9ed Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:27:02 +0900 Subject: [PATCH 21/25] ARM: UniPhier: support 1CS support card for all the UniPhier SoCs Two support card variants are used with UniPhier reference boards: - 1 chip select support card (original CPLD) - 3 chip selects support card (ARIMA-compatible CPLD) Currently, the former is only supported on PH1-Pro4, but it can be expanded to PH1-LD4, PH1-sLD8 with a little code change. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/ph1-ld4/Makefile | 4 +- arch/arm/mach-uniphier/ph1-ld4/sbc_init.c | 54 ++++++++--------- arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c | 50 ++++++++++++++++ arch/arm/mach-uniphier/ph1-pro4/Makefile | 4 +- arch/arm/mach-uniphier/ph1-pro4/sbc_init.c | 32 ---------- .../arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c | 43 ++++++++++++++ arch/arm/mach-uniphier/ph1-sld8/Makefile | 4 +- arch/arm/mach-uniphier/ph1-sld8/sbc_init.c | 59 +------------------ .../arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c | 58 ++++++++++++++++++ 9 files changed, 188 insertions(+), 120 deletions(-) create mode 100644 arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c create mode 100644 arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c create mode 100644 arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c diff --git a/arch/arm/mach-uniphier/ph1-ld4/Makefile b/arch/arm/mach-uniphier/ph1-ld4/Makefile index 927640afd4..5ce3d8a520 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/Makefile +++ b/arch/arm/mach-uniphier/ph1-ld4/Makefile @@ -4,8 +4,10 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o -obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o early_clkrst_init.o \ +obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o +obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o +obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c index 374a8c0680..00f84614f6 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init.c @@ -19,32 +19,32 @@ void sbc_init(void) tmp &= 0xfffffcff; writel(tmp, PC0CTRL); - /* XECS1: sub/boot memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); + /* + * Only CS1 is connected to support card. + * BKSZ[1:0] should be set to "01". + */ + writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10); + writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11); + writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12); + writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14); - /* XECS0: boot/sub memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); - - /* XECS3: peripherals */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34); - - /* base address regsiters */ - writel(0x0000bc01, SBBASE0); - writel(0x0400bc01, SBBASE1); - writel(0x0800bf01, SBBASE3); - - /* enable access to sub memory when boot swap is on */ - if (boot_is_swapped()) - sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */ - - sg_set_pinsel(156, 1); /* PORT25 -> XECS3 */ + if (boot_is_swapped()) { + /* + * Boot Swap On: boot from external NOR/SRAM + * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff. + * + * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank + * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals + */ + writel(0x0000bc01, SBBASE0); + } else { + /* + * Boot Swap Off: boot from mask ROM + * 0x00000000-0x01ffffff: mask ROM + * 0x02000000-0x03efffff: memory bank (31MB) + * 0x03f00000-0x03ffffff: peripherals (1MB) + */ + writel(0x0000be01, SBBASE0); /* dummy */ + writel(0x0200be01, SBBASE1); + } } diff --git a/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c new file mode 100644 index 0000000000..374a8c0680 --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-ld4/sbc_init_3cs.c @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +void sbc_init(void) +{ + u32 tmp; + + /* system bus output enable */ + tmp = readl(PC0CTRL); + tmp &= 0xfffffcff; + writel(tmp, PC0CTRL); + + /* XECS1: sub/boot memory (boot swap = off/on) */ + writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); + writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); + writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); + writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); + + /* XECS0: boot/sub memory (boot swap = off/on) */ + writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); + writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); + writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); + writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); + + /* XECS3: peripherals */ + writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); + writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); + writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32); + writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34); + + /* base address regsiters */ + writel(0x0000bc01, SBBASE0); + writel(0x0400bc01, SBBASE1); + writel(0x0800bf01, SBBASE3); + + /* enable access to sub memory when boot swap is on */ + if (boot_is_swapped()) + sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */ + + sg_set_pinsel(156, 1); /* PORT25 -> XECS3 */ +} diff --git a/arch/arm/mach-uniphier/ph1-pro4/Makefile b/arch/arm/mach-uniphier/ph1-pro4/Makefile index 0390506e89..b88525c82d 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/Makefile +++ b/arch/arm/mach-uniphier/ph1-pro4/Makefile @@ -4,8 +4,10 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o -obj-y += sbc_init.o sg_init.o pll_init.o early_clkrst_init.o \ +obj-y += sg_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o +obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o +obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c index 4cc5e75724..5e75454dcb 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init.c @@ -12,7 +12,6 @@ void sbc_init(void) { -#if defined(CONFIG_PFC_MICRO_SUPPORT_CARD) /* * Only CS1 is connected to support card. * BKSZ[1:0] should be set to "01". @@ -41,35 +40,4 @@ void sbc_init(void) writel(0x0000be01, SBBASE0); /* dummy */ writel(0x0200be01, SBBASE1); } -#elif defined(CONFIG_DCC_MICRO_SUPPORT_CARD) - /* XECS0: boot/sub memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); - - /* XECS1: sub/boot memory (boot swap = off/on) */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); - - /* XECS3: peripherals */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34); - - writel(0x0000bc01, SBBASE0); /* boot memory */ - writel(0x0400bc01, SBBASE1); /* sub memory */ - writel(0x0800bf01, SBBASE3); /* peripherals */ - - /* enable access to sub memory when boot swap is on */ - if (boot_is_swapped()) - sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */ - - sg_set_pinsel(313, 5); /* PORT15 -> XECS3 */ - writel(0x00000001, SG_LOADPINCTRL); - -#endif /* CONFIG_XXX_MICRO_SUPPORT_CARD */ } diff --git a/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c new file mode 100644 index 0000000000..67e6d8245b --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-pro4/sbc_init_3cs.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +void sbc_init(void) +{ + /* XECS0: boot/sub memory (boot swap = off/on) */ + writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); + writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); + writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); + writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); + + /* XECS1: sub/boot memory (boot swap = off/on) */ + writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); + writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); + writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); + writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); + + /* XECS3: peripherals */ + writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); + writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); + writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32); + writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34); + + writel(0x0000bc01, SBBASE0); /* boot memory */ + writel(0x0400bc01, SBBASE1); /* sub memory */ + writel(0x0800bf01, SBBASE3); /* peripherals */ + + /* enable access to sub memory when boot swap is on */ + if (boot_is_swapped()) + sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */ + + sg_set_pinsel(313, 5); /* PORT15 -> XECS3 */ + writel(0x00000001, SG_LOADPINCTRL); +} diff --git a/arch/arm/mach-uniphier/ph1-sld8/Makefile b/arch/arm/mach-uniphier/ph1-sld8/Makefile index 927640afd4..5ce3d8a520 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/Makefile +++ b/arch/arm/mach-uniphier/ph1-sld8/Makefile @@ -4,8 +4,10 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o -obj-y += bcu_init.o sbc_init.o sg_init.o pll_init.o early_clkrst_init.o \ +obj-y += bcu_init.o sg_init.o pll_init.o early_clkrst_init.o \ pll_spectrum.o umc_init.o ddrphy_init.o +obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += sbc_init.o +obj-$(CONFIG_DCC_MICRO_SUPPORT_CARD) += sbc_init_3cs.o else obj-$(CONFIG_BOARD_EARLY_INIT_F) += pinctrl.o clkrst_init.o obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o diff --git a/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c index fdef88e126..225c0d24de 100644 --- a/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c +++ b/arch/arm/mach-uniphier/ph1-sld8/sbc_init.c @@ -1,58 +1 @@ -/* - * Copyright (C) 2011-2015 Panasonic Corporation - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -void sbc_init(void) -{ - u32 tmp; - - /* system bus output enable */ - tmp = readl(PC0CTRL); - tmp &= 0xfffffcff; - writel(tmp, PC0CTRL); - - /* - * SBCTRL0* does not need settings because PH1-sLD8 has no support for - * XECS0. The boot swap must be enabled to boot from the support card. - */ - - if (boot_is_swapped()) { - /* XECS1 : boot memory if boot swap is on */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); - } - - /* XECS4 : sub memory */ - writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL40); - writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL41); - writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL42); - writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL44); - - /* XECS5 : peripherals */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL50); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL51); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL52); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL54); - - /* base address regsiters */ - writel(0x0000bc01, SBBASE0); /* boot memory */ - writel(0x0900bfff, SBBASE1); /* dummy */ - writel(0x0400bc01, SBBASE4); /* sub memory */ - writel(0x0800bf01, SBBASE5); /* peripherals */ - - sg_set_pinsel(134, 16); /* XIRQ6 -> XECS4 */ - sg_set_pinsel(135, 16); /* XIRQ7 -> XECS5 */ - - /* dummy read to assure write process */ - readl(SG_PINCTRL(0)); -} +#include "../ph1-ld4/sbc_init.c" diff --git a/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c b/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c new file mode 100644 index 0000000000..fdef88e126 --- /dev/null +++ b/arch/arm/mach-uniphier/ph1-sld8/sbc_init_3cs.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +void sbc_init(void) +{ + u32 tmp; + + /* system bus output enable */ + tmp = readl(PC0CTRL); + tmp &= 0xfffffcff; + writel(tmp, PC0CTRL); + + /* + * SBCTRL0* does not need settings because PH1-sLD8 has no support for + * XECS0. The boot swap must be enabled to boot from the support card. + */ + + if (boot_is_swapped()) { + /* XECS1 : boot memory if boot swap is on */ + writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); + writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); + writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); + writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); + } + + /* XECS4 : sub memory */ + writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL40); + writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL41); + writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL42); + writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL44); + + /* XECS5 : peripherals */ + writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL50); + writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL51); + writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL52); + writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL54); + + /* base address regsiters */ + writel(0x0000bc01, SBBASE0); /* boot memory */ + writel(0x0900bfff, SBBASE1); /* dummy */ + writel(0x0400bc01, SBBASE4); /* sub memory */ + writel(0x0800bf01, SBBASE5); /* peripherals */ + + sg_set_pinsel(134, 16); /* XIRQ6 -> XECS4 */ + sg_set_pinsel(135, 16); /* XIRQ7 -> XECS5 */ + + /* dummy read to assure write process */ + readl(SG_PINCTRL(0)); +} From afed8c1b6a28bc201dd3633f914572bbf693e620 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:27:03 +0900 Subject: [PATCH 22/25] ARM: UniPhier: switch to 1CS support card The 3CS support card (CONFIG_DCC_MICRO_SUPPORT_CARD) used to be used very often before, but it is recently getting a minority. Swith to the 1CS support card (CONFIG_PFC_MICRO_SUPPORT_CARD). Signed-off-by: Masahiro Yamada --- configs/ph1_ld4_defconfig | 2 +- configs/ph1_pro4_defconfig | 2 +- configs/ph1_sld8_defconfig | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig index edfdafa246..292f2ca13e 100644 --- a/configs/ph1_ld4_defconfig +++ b/configs/ph1_ld4_defconfig @@ -4,7 +4,7 @@ CONFIG_DM=y CONFIG_DM_SERIAL=y CONFIG_DM_I2C=y CONFIG_MACH_PH1_LD4=y -CONFIG_DCC_MICRO_SUPPORT_CARD=y +CONFIG_PFC_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ph1_pro4_defconfig b/configs/ph1_pro4_defconfig index ace5fc5014..202186245e 100644 --- a/configs/ph1_pro4_defconfig +++ b/configs/ph1_pro4_defconfig @@ -4,7 +4,7 @@ CONFIG_DM=y CONFIG_DM_SERIAL=y CONFIG_DM_I2C=y CONFIG_MACH_PH1_PRO4=y -CONFIG_DCC_MICRO_SUPPORT_CARD=y +CONFIG_PFC_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig index 0d437c66f4..cf229aef25 100644 --- a/configs/ph1_sld8_defconfig +++ b/configs/ph1_sld8_defconfig @@ -4,7 +4,7 @@ CONFIG_DM=y CONFIG_DM_SERIAL=y CONFIG_DM_I2C=y CONFIG_MACH_PH1_SLD8=y -CONFIG_DCC_MICRO_SUPPORT_CARD=y +CONFIG_PFC_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y From 6cc2120646a3230bcf4b57cb3cb937f4a1cfe150 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:27:04 +0900 Subject: [PATCH 23/25] ARM: UniPhier: consolidate MEMCONF setting code This code is duplicated in ph1-ld4/sg_init.c and ph1-pro4/sg_init.c. Merge the same code into a new file, memconf.c. The helper functions no longer have to be placed in the header file. Also, move them into memconf.c. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Makefile | 1 + arch/arm/mach-uniphier/include/mach/sg-regs.h | 119 +----------------- arch/arm/mach-uniphier/memconf.c | 104 +++++++++++++++ arch/arm/mach-uniphier/ph1-ld4/sg_init.c | 11 +- arch/arm/mach-uniphier/ph1-pro4/sg_init.c | 11 +- arch/arm/mach-uniphier/spl.c | 11 +- 6 files changed, 116 insertions(+), 141 deletions(-) create mode 100644 arch/arm/mach-uniphier/memconf.c diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index df418dd3c4..e7a801b2ac 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -7,6 +7,7 @@ ifdef CONFIG_SPL_BUILD obj-y += lowlevel_init.o obj-y += init_page_table.o obj-y += spl.o +obj-y += memconf.o obj-y += ddrphy_training.o else diff --git a/arch/arm/mach-uniphier/include/mach/sg-regs.h b/arch/arm/mach-uniphier/include/mach/sg-regs.h index 4ae67c8adb..63408d5ba7 100644 --- a/arch/arm/mach-uniphier/include/mach/sg-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sg-regs.h @@ -1,7 +1,7 @@ /* * UniPhier SG (SoC Glue) block registers * - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * * SPDX-License-Identifier: GPL-2.0+ */ @@ -108,7 +108,6 @@ #else #include -#include #include static inline void sg_set_pinsel(int n, int value) @@ -117,122 +116,6 @@ static inline void sg_set_pinsel(int n, int value) | SG_PINSEL_MODE(n, value), SG_PINSEL_ADDR(n)); } -static inline u32 sg_memconf_val_ch0(unsigned long size, int num) -{ - int size_mb = size / num; - u32 ret; - - switch (size_mb) { - case SZ_64M: - ret = SG_MEMCONF_CH0_SZ_64M; - break; - case SZ_128M: - ret = SG_MEMCONF_CH0_SZ_128M; - break; - case SZ_256M: - ret = SG_MEMCONF_CH0_SZ_256M; - break; - case SZ_512M: - ret = SG_MEMCONF_CH0_SZ_512M; - break; - case SZ_1G: - ret = SG_MEMCONF_CH0_SZ_1G; - break; - default: - BUG(); - break; - } - - switch (num) { - case 1: - ret |= SG_MEMCONF_CH0_NUM_1; - break; - case 2: - ret |= SG_MEMCONF_CH0_NUM_2; - break; - default: - BUG(); - break; - } - return ret; -} - -static inline u32 sg_memconf_val_ch1(unsigned long size, int num) -{ - int size_mb = size / num; - u32 ret; - - switch (size_mb) { - case SZ_64M: - ret = SG_MEMCONF_CH1_SZ_64M; - break; - case SZ_128M: - ret = SG_MEMCONF_CH1_SZ_128M; - break; - case SZ_256M: - ret = SG_MEMCONF_CH1_SZ_256M; - break; - case SZ_512M: - ret = SG_MEMCONF_CH1_SZ_512M; - break; - case SZ_1G: - ret = SG_MEMCONF_CH1_SZ_1G; - break; - default: - BUG(); - break; - } - - switch (num) { - case 1: - ret |= SG_MEMCONF_CH1_NUM_1; - break; - case 2: - ret |= SG_MEMCONF_CH1_NUM_2; - break; - default: - BUG(); - break; - } - return ret; -} - -static inline u32 sg_memconf_val_ch2(unsigned long size, int num) -{ - int size_mb = size / num; - u32 ret; - - switch (size_mb) { - case SZ_64M: - ret = SG_MEMCONF_CH2_SZ_64M; - break; - case SZ_128M: - ret = SG_MEMCONF_CH2_SZ_128M; - break; - case SZ_256M: - ret = SG_MEMCONF_CH2_SZ_256M; - break; - case SZ_512M: - ret = SG_MEMCONF_CH2_SZ_512M; - break; - default: - BUG(); - break; - } - - switch (num) { - case 1: - ret |= SG_MEMCONF_CH2_NUM_1; - break; - case 2: - ret |= SG_MEMCONF_CH2_NUM_2; - break; - default: - BUG(); - break; - } - return ret; -} #endif /* __ASSEMBLY__ */ #endif /* ARCH_SG_REGS_H */ diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c new file mode 100644 index 0000000000..bf3c177ed9 --- /dev/null +++ b/arch/arm/mach-uniphier/memconf.c @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2011-2015 Panasonic Corporation + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +static inline u32 sg_memconf_val_ch0(unsigned long size, int num) +{ + int size_mb = size / num; + u32 ret; + + switch (size_mb) { + case SZ_64M: + ret = SG_MEMCONF_CH0_SZ_64M; + break; + case SZ_128M: + ret = SG_MEMCONF_CH0_SZ_128M; + break; + case SZ_256M: + ret = SG_MEMCONF_CH0_SZ_256M; + break; + case SZ_512M: + ret = SG_MEMCONF_CH0_SZ_512M; + break; + case SZ_1G: + ret = SG_MEMCONF_CH0_SZ_1G; + break; + default: + BUG(); + break; + } + + switch (num) { + case 1: + ret |= SG_MEMCONF_CH0_NUM_1; + break; + case 2: + ret |= SG_MEMCONF_CH0_NUM_2; + break; + default: + BUG(); + break; + } + return ret; +} + +static inline u32 sg_memconf_val_ch1(unsigned long size, int num) +{ + int size_mb = size / num; + u32 ret; + + switch (size_mb) { + case SZ_64M: + ret = SG_MEMCONF_CH1_SZ_64M; + break; + case SZ_128M: + ret = SG_MEMCONF_CH1_SZ_128M; + break; + case SZ_256M: + ret = SG_MEMCONF_CH1_SZ_256M; + break; + case SZ_512M: + ret = SG_MEMCONF_CH1_SZ_512M; + break; + case SZ_1G: + ret = SG_MEMCONF_CH1_SZ_1G; + break; + default: + BUG(); + break; + } + + switch (num) { + case 1: + ret |= SG_MEMCONF_CH1_NUM_1; + break; + case 2: + ret |= SG_MEMCONF_CH1_NUM_2; + break; + default: + BUG(); + break; + } + return ret; +} + +void memconf_init(void) +{ + u32 tmp; + + /* Set DDR size */ + tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0); + tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1); +#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE + tmp |= SG_MEMCONF_SPARSEMEM; +#endif + writel(tmp, SG_MEMCONF); +} diff --git a/arch/arm/mach-uniphier/ph1-ld4/sg_init.c b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c index e6bfa97c9f..93e44afd19 100644 --- a/arch/arm/mach-uniphier/ph1-ld4/sg_init.c +++ b/arch/arm/mach-uniphier/ph1-ld4/sg_init.c @@ -1,11 +1,10 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ -#include #include #include @@ -13,14 +12,6 @@ void sg_init(void) { u32 tmp; - /* Set DDR size */ - tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0); - tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1); -#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE - tmp |= SG_MEMCONF_SPARSEMEM; -#endif - writel(tmp, SG_MEMCONF); - /* Input ports must be enabled before deasserting reset of cores */ tmp = readl(SG_IECTRL); tmp |= 0x1; diff --git a/arch/arm/mach-uniphier/ph1-pro4/sg_init.c b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c index c25afa8e06..8677666323 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/sg_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/sg_init.c @@ -1,11 +1,10 @@ /* - * Copyright (C) 2011-2014 Panasonic Corporation + * Copyright (C) 2011-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ */ -#include #include #include @@ -13,14 +12,6 @@ void sg_init(void) { u32 tmp; - /* Set DDR size */ - tmp = sg_memconf_val_ch0(CONFIG_SDRAM0_SIZE, CONFIG_DDR_NUM_CH0); - tmp |= sg_memconf_val_ch1(CONFIG_SDRAM1_SIZE, CONFIG_DDR_NUM_CH1); -#if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE < CONFIG_SDRAM1_BASE - tmp |= SG_MEMCONF_SPARSEMEM; -#endif - writel(tmp, SG_MEMCONF); - /* Input ports must be enabled before deasserting reset of cores */ tmp = readl(SG_IECTRL); tmp |= 1 << 6; diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c index c8a2469f6a..c3d90d03d0 100644 --- a/arch/arm/mach-uniphier/spl.c +++ b/arch/arm/mach-uniphier/spl.c @@ -18,6 +18,7 @@ void sbc_init(void); void sg_init(void); void pll_init(void); void pin_init(void); +void memconf_init(void); void early_clkrst_init(void); int umc_init(void); void enable_dpll_ssc(void); @@ -38,10 +39,14 @@ void spl_board_init(void) led_write(L, 0, , ); - early_clkrst_init(); + memconf_init(); led_write(L, 1, , ); + early_clkrst_init(); + + led_write(L, 2, , ); + { int res; @@ -51,9 +56,9 @@ void spl_board_init(void) ; } } - led_write(L, 2, , ); + led_write(L, 3, , ); enable_dpll_ssc(); - led_write(L, 3, , ); + led_write(L, 4, , ); } From b76fa3a34ba8d64e75781c2d177a9a631d06d214 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:27:05 +0900 Subject: [PATCH 24/25] ARM: UniPhier: remove stop_mpll() from PH1-Pro4 PLL initialization This function was intended for MN2WS0235 (what we call PH1-Pro4TV). On that SoC, MPLL is already running on the power-on reset and it makes sense to stop the PLL at early boot-up. On the other hand, PH1-Pro4(R) does not have SC_MPLLOSCCTL register, so this function has no point. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/include/mach/sc-regs.h | 4 ---- arch/arm/mach-uniphier/ph1-pro4/pll_init.c | 17 ----------------- 2 files changed, 21 deletions(-) diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index caec6c2574..20878e2d1c 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -11,10 +11,6 @@ #define SC_BASE_ADDR 0x61840000 -#define SC_MPLLOSCCTL (SC_BASE_ADDR | 0x1184) -#define SC_MPLLOSCCTL_MPLLEN (0x1 << 0) -#define SC_MPLLOSCCTL_MPLLST (0x1 << 1) - #define SC_DPLLCTRL (SC_BASE_ADDR | 0x1200) #define SC_DPLLCTRL_SSC_EN (0x1 << 31) #define SC_DPLLCTRL_FOUTMODE_MASK (0xf << 16) diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c index 3d29548595..2a965a5e67 100644 --- a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c +++ b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c @@ -46,22 +46,6 @@ static void dpll_init(void) writel(tmp, SC_DPLLCTRL2); } -static void stop_mpll(void) -{ - u32 tmp; - - tmp = readl(SC_MPLLOSCCTL); - - if (!(tmp & SC_MPLLOSCCTL_MPLLST)) - return; /* already stopped */ - - tmp &= ~SC_MPLLOSCCTL_MPLLEN; - writel(tmp, SC_MPLLOSCCTL); - - while (readl(SC_MPLLOSCCTL) & SC_MPLLOSCCTL_MPLLST) - ; -} - static void vpll_init(void) { u32 tmp, clk_mode_axosel; @@ -157,7 +141,6 @@ static void vpll_init(void) void pll_init(void) { dpll_init(); - stop_mpll(); vpll_init(); /* From 105a9e705efaeeac63e795e2a184b0a18db0ac5a Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 27 Feb 2015 02:27:06 +0900 Subject: [PATCH 25/25] ARM: UniPhier: remove SSC_WAY_SIZE and SSC_NUM_ENTRIES macros Each way of the system cache has 256 entries for PH1-Pro4 and older SoCs, whereas 512 entries for PH1-Pro5 and newer SoCs. The line size is still 128 byte. Thus, the way size is 32KB/64KB for old/new SoCs. To keep lowlevel_init SoC-independent, set BOOT_RAM_SIZE to the constant value 32KB. It is large enough for temporary RAM and should work for all the SoCs of UniPhier family. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/include/mach/ssc-regs.h | 2 -- arch/arm/mach-uniphier/lowlevel_init.S | 10 +++++++--- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-uniphier/include/mach/ssc-regs.h b/arch/arm/mach-uniphier/include/mach/ssc-regs.h index 77b3470c6d..02fca3b6f6 100644 --- a/arch/arm/mach-uniphier/include/mach/ssc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/ssc-regs.h @@ -60,8 +60,6 @@ #define SSCOQCE0 0x506c0270 #define SSC_LINE_SIZE 128 -#define SSC_NUM_ENTRIES 256 -#define SSC_WAY_SIZE ((SSC_LINE_SIZE) * (SSC_NUM_ENTRIES)) #define SSC_RANGE_OP_MAX_SIZE (0x00400000 - (SSC_LINE_SIZE)) #endif /* ARCH_SSC_REGS_H */ diff --git a/arch/arm/mach-uniphier/lowlevel_init.S b/arch/arm/mach-uniphier/lowlevel_init.S index 4b8b623b95..92299fe64d 100644 --- a/arch/arm/mach-uniphier/lowlevel_init.S +++ b/arch/arm/mach-uniphier/lowlevel_init.S @@ -7,10 +7,12 @@ #include #include +#include #include #include #include #include +#include ENTRY(lowlevel_init) mov r8, lr @ persevere link reg across call @@ -122,9 +124,11 @@ ENTRY(enable_mmu) mov pc, lr ENDPROC(enable_mmu) -#include - -#define BOOT_RAM_SIZE (SSC_WAY_SIZE) +/* + * For PH1-Pro4 or older SoCs, the size of WAY is 32KB. + * It is large enough for tmp RAM. + */ +#define BOOT_RAM_SIZE (SZ_32K) #define BOOT_WAY_BITS (0x00000100) /* way 8 */ ENTRY(setup_init_ram)