imx: ventana: fix usage of dt paths with leading 0s (Linux 4.15+)
device-tree paths should never be used that reference node addresses making an assumption about leading zeros. They should not be there per the device-tree specification however they have been there until Linux 4.15 when they were removed via kernel commit 8dccafaa281aa1d240a58bbcdff338aec114a021. This fixes various issues which will occur when using Linux 4.15+ that are being fixed up on a per model per PCB revision basis such as: - enabling MMC UHS-I on board revisions that support it - enabling PWM based on hwconfig - fixing PCIe reset on GW552x - removing cpu external watchdog reset on boards that do not support it - populate PCI dt nodes based on PCI scan in order to fix GW16082 interrupt mapping and inject MAC address for PCI based GbE Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This commit is contained in:
Tim Harvey
Stefano Babic
parent
ad2efa3a28
commit
1d23f7b1ae
@ -879,34 +879,12 @@ static int ft_sethdmiinfmt(void *blob, char *mode)
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return 0;
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}
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/* enable a property of a node if the node is found */
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static inline void ft_enable_path(void *blob, const char *path)
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{
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int i = fdt_path_offset(blob, path);
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if (i >= 0) {
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debug("enabling %s\n", path);
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fdt_status_okay(blob, i);
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}
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}
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/* remove a property of a node if the node is found */
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static inline void ft_delprop_path(void *blob, const char *path,
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const char *name)
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{
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int i = fdt_path_offset(blob, path);
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if (i) {
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debug("removing %s/%s\n", path, name);
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fdt_delprop(blob, i, name);
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}
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}
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#if defined(CONFIG_CMD_PCI)
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#define PCI_ID(x) ( \
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(PCI_BUS(x->devfn)<<16)| \
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(PCI_DEV(x->devfn)<<11)| \
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(PCI_FUNC(x->devfn)<<8) \
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)
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#define PCIE_PATH "/soc/pcie@0x01000000"
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int fdt_add_pci_node(void *blob, int par, struct pci_dev *dev)
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{
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uint32_t reg[5];
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@ -939,7 +917,7 @@ int fdt_add_pci_path(void *blob, struct pci_dev *dev)
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int k, np;
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/* build list of parents */
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np = fdt_path_offset(blob, PCIE_PATH);
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np = fdt_node_offset_by_compatible(blob, -1, "fsl,imx6q-pcie");
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if (np < 0)
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return np;
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@ -976,7 +954,7 @@ int fdt_fixup_gw16082(void *blob, int np, struct pci_dev *dev)
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int i;
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/* build irq-map based on host controllers map */
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host = fdt_path_offset(blob, PCIE_PATH);
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host = fdt_node_offset_by_compatible(blob, -1, "fsl,imx6q-pcie");
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if (host < 0) {
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printf(" %s failed: missing host\n", __func__);
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return host;
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@ -1118,10 +1096,14 @@ void ft_board_pci_fixup(void *blob, bd_t *bd)
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}
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#endif /* if defined(CONFIG_CMD_PCI) */
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void ft_board_wdog_fixup(void *blob, const char *path)
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void ft_board_wdog_fixup(void *blob, phys_addr_t addr)
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{
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ft_delprop_path(blob, path, "ext-reset-output");
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ft_delprop_path(blob, path, "fsl,ext-reset-output");
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int off = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt", addr);
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if (off) {
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fdt_delprop(blob, off, "ext-reset-output");
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fdt_delprop(blob, off, "fsl,ext-reset-output");
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}
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}
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/*
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@ -1133,10 +1115,11 @@ void ft_board_wdog_fixup(void *blob, const char *path)
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* - board (full model from EEPROM)
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* - peripherals removed from DTB if not loaded on board (per EEPROM config)
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*/
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#define UART1_PATH "/soc/aips-bus@02100000/serial@021ec000"
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#define WDOG1_PATH "/soc/aips-bus@02000000/wdog@020bc000"
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#define WDOG2_PATH "/soc/aips-bus@02000000/wdog@020c0000"
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#define GPIO3_PATH "/soc/aips-bus@02000000/gpio@020a4000"
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#define WDOG1_ADDR 0x20bc000
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#define WDOG2_ADDR 0x20c0000
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#define GPIO3_ADDR 0x20a4000
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#define USDHC3_ADDR 0x2198000
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#define PWM0_ADDR 0x2080000
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int ft_board_setup(void *blob, bd_t *bd)
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{
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struct ventana_board_info *info = &ventana_info;
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@ -1199,14 +1182,15 @@ int ft_board_setup(void *blob, bd_t *bd)
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* errata causing wdog timer to be unreliable.
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*/
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if (rev >= 'A' && rev < 'C') {
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i = fdt_path_offset(blob, WDOG1_PATH);
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i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-wdt",
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WDOG1_ADDR);
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if (i)
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fdt_status_disabled(blob, i);
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}
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/* GW51xx-E adds WDOG1_B external reset */
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if (rev < 'E')
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ft_board_wdog_fixup(blob, WDOG1_PATH);
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ft_board_wdog_fixup(blob, WDOG1_ADDR);
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break;
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case GW52xx:
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@ -1222,7 +1206,8 @@ int ft_board_setup(void *blob, bd_t *bd)
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"reset-gpio", NULL);
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if (range) {
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i = fdt_path_offset(blob, GPIO3_PATH);
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i = fdt_node_offset_by_compat_reg(blob,
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"fsl,imx6q-gpio", GPIO3_ADDR);
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if (i)
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handle = fdt_get_phandle(blob, i);
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if (handle) {
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@ -1237,18 +1222,19 @@ int ft_board_setup(void *blob, bd_t *bd)
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gpio_cfg[board_type].usd_vsel = 0;
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/* GW522x-B adds WDOG1_B external reset */
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ft_board_wdog_fixup(blob, WDOG1_PATH);
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if (rev < 'B')
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ft_board_wdog_fixup(blob, WDOG1_ADDR);
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}
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/* GW520x-E adds WDOG1_B external reset */
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else if (info->model[4] == '0' && rev < 'E')
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ft_board_wdog_fixup(blob, WDOG1_PATH);
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ft_board_wdog_fixup(blob, WDOG1_ADDR);
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break;
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case GW53xx:
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/* GW53xx-E adds WDOG1_B external reset */
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if (rev < 'E')
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ft_board_wdog_fixup(blob, WDOG1_PATH);
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ft_board_wdog_fixup(blob, WDOG1_ADDR);
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break;
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case GW54xx:
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@ -1256,13 +1242,12 @@ int ft_board_setup(void *blob, bd_t *bd)
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* disable serial2 node for GW54xx for compatibility with older
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* 3.10.x kernel that improperly had this node enabled in the DT
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*/
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i = fdt_path_offset(blob, UART1_PATH);
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if (i)
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fdt_del_node(blob, i);
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fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED,
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0);
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/* GW54xx-E adds WDOG2_B external reset */
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if (rev < 'E')
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ft_board_wdog_fixup(blob, WDOG2_PATH);
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ft_board_wdog_fixup(blob, WDOG2_ADDR);
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break;
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case GW551x:
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@ -1311,13 +1296,13 @@ int ft_board_setup(void *blob, bd_t *bd)
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/* GW551x-C adds WDOG1_B external reset */
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if (rev < 'C')
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ft_board_wdog_fixup(blob, WDOG1_PATH);
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ft_board_wdog_fixup(blob, WDOG1_ADDR);
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break;
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case GW5901:
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case GW5902:
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/* GW5901/GW5901 revB adds WDOG1_B as an external reset */
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if (rev < 'B')
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ft_board_wdog_fixup(blob, WDOG1_PATH);
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ft_board_wdog_fixup(blob, WDOG1_ADDR);
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break;
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}
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@ -1331,20 +1316,27 @@ int ft_board_setup(void *blob, bd_t *bd)
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continue;
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if (hwconfig_subarg_cmp(arg, "mode", "pwm") && cfg->pwm_param)
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{
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char path[48];
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sprintf(path, "/soc/aips-bus@02000000/pwm@%08x",
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0x02080000 + (0x4000 * (cfg->pwm_param - 1)));
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phys_addr_t addr;
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int off;
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printf(" Enabling pwm%d for DIO%d\n",
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cfg->pwm_param, i);
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ft_enable_path(blob, path);
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addr = PWM0_ADDR + (0x4000 * (cfg->pwm_param - 1));
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off = fdt_node_offset_by_compat_reg(blob,
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"fsl,imx6q-pwm",
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addr);
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if (off)
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fdt_status_okay(blob, off);
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}
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}
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/* remove no-1-8-v if UHS-I support is present */
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if (gpio_cfg[board_type].usd_vsel) {
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debug("Enabling UHS-I support\n");
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ft_delprop_path(blob, "/soc/aips-bus@02100000/usdhc@02198000",
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"no-1-8-v");
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i = fdt_node_offset_by_compat_reg(blob, "fsl,imx6q-usdhc",
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USDHC3_ADDR);
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if (i)
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fdt_delprop(blob, i, "no-1-8-v");
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}
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#if defined(CONFIG_CMD_PCI)
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