Merge with git://www.denx.de/git/u-boot.git
This commit is contained in:
Stefan Roese
commit
1d1ab638f8
2
Makefile
2
Makefile
@ -190,6 +190,8 @@ endif
|
||||
OBJS := $(addprefix $(obj),$(OBJS))
|
||||
|
||||
LIBS = lib_generic/libgeneric.a
|
||||
LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \
|
||||
"board/$(VENDOR)/common/lib$(VENDOR).a"; fi)
|
||||
LIBS += board/$(BOARDDIR)/lib$(BOARD).a
|
||||
LIBS += cpu/$(CPU)/lib$(CPU).a
|
||||
ifdef SOC
|
||||
|
||||
10
README
10
README
@ -338,7 +338,7 @@ The following options need to be configured:
|
||||
CONFIG_OF_LIBFDT
|
||||
* New libfdt-based support
|
||||
* Adds the "fdt" command
|
||||
* The bootm command does _not_ modify the fdt
|
||||
* The bootm command automatically updates the fdt
|
||||
|
||||
CONFIG_OF_FLAT_TREE
|
||||
* Deprecated, see CONFIG_OF_LIBFDT
|
||||
@ -347,15 +347,13 @@ The following options need to be configured:
|
||||
* The environment variable "disable_of", when set,
|
||||
disables this functionality.
|
||||
|
||||
CONFIG_OF_FLAT_TREE_MAX_SIZE
|
||||
|
||||
The maximum size of the constructed OF tree.
|
||||
|
||||
OF_CPU - The proper name of the cpus node.
|
||||
OF_SOC - The proper name of the soc node.
|
||||
OF_TBCLK - The timebase frequency.
|
||||
OF_STDOUT_PATH - The path to the console device
|
||||
|
||||
boards with QUICC Engines require OF_QE to set UCC mac addresses
|
||||
|
||||
CONFIG_OF_HAS_BD_T
|
||||
|
||||
* CONFIG_OF_LIBFDT - enables the "fdt bd_t" command
|
||||
@ -365,7 +363,7 @@ The following options need to be configured:
|
||||
|
||||
CONFIG_OF_HAS_UBOOT_ENV
|
||||
|
||||
* CONFIG_OF_LIBFDT - enables the "fdt bd_t" command
|
||||
* CONFIG_OF_LIBFDT - enables the "fdt env" command
|
||||
* CONFIG_OF_FLAT_TREE - The resulting flat device tree
|
||||
will have a copy of u-boot's environment variables
|
||||
|
||||
|
||||
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@ -362,20 +362,28 @@ pci_init_board(void)
|
||||
);
|
||||
|
||||
|
||||
/* outbound memory */
|
||||
/* inbound */
|
||||
pci_set_region(hose->regions + 0,
|
||||
CFG_PCI_MEMORY_BUS,
|
||||
CFG_PCI_MEMORY_PHYS,
|
||||
CFG_PCI_MEMORY_SIZE,
|
||||
PCI_REGION_MEM | PCI_REGION_MEMORY);
|
||||
|
||||
|
||||
/* outbound memory */
|
||||
pci_set_region(hose->regions + 1,
|
||||
CFG_PCI1_MEM_BASE,
|
||||
CFG_PCI1_MEM_PHYS,
|
||||
CFG_PCI1_MEM_SIZE,
|
||||
PCI_REGION_MEM);
|
||||
|
||||
/* outbound io */
|
||||
pci_set_region(hose->regions + 1,
|
||||
pci_set_region(hose->regions + 2,
|
||||
CFG_PCI1_IO_BASE,
|
||||
CFG_PCI1_IO_PHYS,
|
||||
CFG_PCI1_IO_SIZE,
|
||||
PCI_REGION_IO);
|
||||
hose->region_count = 2;
|
||||
hose->region_count = 3;
|
||||
|
||||
/* relocate config table pointers */
|
||||
hose->config_table = \
|
||||
|
||||
56
board/freescale/common/Makefile
Normal file
56
board/freescale/common/Makefile
Normal file
@ -0,0 +1,56 @@
|
||||
#
|
||||
# (C) Copyright 2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
ifneq ($(OBJTREE),$(SRCTREE))
|
||||
$(shell mkdir -p $(obj)board/$(VENDOR)/common)
|
||||
endif
|
||||
|
||||
LIB = $(obj)lib$(VENDOR).a
|
||||
|
||||
COBJS := sys_eeprom.o \
|
||||
pixis.o \
|
||||
pq-mds-pib.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS)
|
||||
$(AR) $(ARFLAGS) $@ $(OBJS)
|
||||
|
||||
clean:
|
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean
|
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
@ -27,6 +27,8 @@
|
||||
#include <watchdog.h>
|
||||
#include <asm/cache.h>
|
||||
|
||||
#ifdef CONFIG_FSL_PIXIS
|
||||
|
||||
#include "pixis.h"
|
||||
|
||||
|
||||
@ -470,3 +472,4 @@ U_BOOT_CMD(
|
||||
" pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n"
|
||||
" pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n"
|
||||
);
|
||||
#endif /* CONFIG_FSL_PIXIS */
|
||||
|
||||
@ -12,6 +12,8 @@
|
||||
#include <i2c.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#ifdef CONFIG_PQ_MDS_PIB
|
||||
|
||||
#include "pq-mds-pib.h"
|
||||
|
||||
int pib_init(void)
|
||||
@ -100,3 +102,4 @@ int pib_init(void)
|
||||
i2c_set_bus_num(orig_i2c_bus);
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_PQ_MDS_PIB */
|
||||
|
||||
@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS := $(BOARD).o pci.o ../common/pq-mds-pib.o
|
||||
COBJS := $(BOARD).o pci.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
||||
@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS := $(BOARD).o pci.o ../common/pq-mds-pib.o
|
||||
COBJS := $(BOARD).o pci.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
||||
@ -24,14 +24,9 @@
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
ifneq ($(OBJTREE),$(SRCTREE))
|
||||
$(shell mkdir -p $(obj)../common)
|
||||
endif
|
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS := $(BOARD).o \
|
||||
../common/pixis.o
|
||||
COBJS := $(BOARD).o
|
||||
|
||||
SOBJS := init.o
|
||||
|
||||
|
||||
@ -23,15 +23,9 @@
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
ifneq ($(OBJTREE),$(SRCTREE))
|
||||
$(shell mkdir -p $(obj)../common)
|
||||
endif
|
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS := $(BOARD).o \
|
||||
../common/sys_eeprom.o \
|
||||
../common/pixis.o
|
||||
COBJS := $(BOARD).o
|
||||
|
||||
SOBJS := init.o
|
||||
|
||||
|
||||
@ -1,537 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2001
|
||||
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
|
||||
*
|
||||
* (C) Copyright 2001-2004
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* (C) Copyright 2003
|
||||
* Texas Instruments, <www.ti.com>
|
||||
* Kshitij Gupta <Kshitij@ti.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/sizes.h>
|
||||
#include <linux/byteorder/swab.h>
|
||||
|
||||
#define PHYS_FLASH_SECT_SIZE SZ_128K
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
|
||||
|
||||
/* Board support for 1 or 2 flash devices */
|
||||
#undef FLASH_PORT_WIDTH32
|
||||
#define FLASH_PORT_WIDTH16
|
||||
|
||||
#ifdef FLASH_PORT_WIDTH16
|
||||
# define FLASH_PORT_WIDTH ushort
|
||||
# define FLASH_PORT_WIDTHV vu_short
|
||||
# define SWAP(x) __swab16(x)
|
||||
#else
|
||||
# define FLASH_PORT_WIDTH ulong
|
||||
# define FLASH_PORT_WIDTHV vu_long
|
||||
# define SWAP(x) __swab32(x)
|
||||
#endif
|
||||
|
||||
#define FPW FLASH_PORT_WIDTH
|
||||
#define FPWV FLASH_PORT_WIDTHV
|
||||
|
||||
#define mb() __asm__ __volatile__ ("" : : : "memory")
|
||||
|
||||
|
||||
/* Flash Organization Structure */
|
||||
typedef struct OrgDef {
|
||||
unsigned int sector_number;
|
||||
unsigned int sector_size;
|
||||
} OrgDef;
|
||||
|
||||
|
||||
/* Flash Organizations */
|
||||
OrgDef OrgIntel_28F256L18T[] = {
|
||||
{4, SZ_32K}, /* 4 * 32kBytes sectors */
|
||||
{255, SZ_128K}, /* 255 * 128kBytes sectors */
|
||||
};
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions
|
||||
*/
|
||||
unsigned long flash_init (void);
|
||||
static ulong flash_get_size (FPW * addr, flash_info_t * info);
|
||||
static int write_data (flash_info_t * info, ulong dest, FPW data);
|
||||
static void flash_get_offsets (ulong base, flash_info_t * info);
|
||||
void inline spin_wheel (void);
|
||||
void flash_print_info (flash_info_t * info);
|
||||
void flash_unprotect_sectors (FPWV * addr);
|
||||
int flash_erase (flash_info_t * info, int s_first, int s_last);
|
||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
|
||||
void flash_unlock(flash_info_t * info, int bank);
|
||||
int flash_probe(void);
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* see if flash is ok */
|
||||
int flash_probe(void)
|
||||
{
|
||||
return(flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[0]));
|
||||
}
|
||||
|
||||
unsigned long flash_init (void)
|
||||
{
|
||||
int i;
|
||||
ulong size = 0;
|
||||
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
|
||||
switch (i) {
|
||||
case 0:
|
||||
flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
|
||||
flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
|
||||
/* to reset the lock bit */
|
||||
flash_unlock(&flash_info[i],i);
|
||||
break;
|
||||
case 1:
|
||||
flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
|
||||
flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
|
||||
/* to reset the lock bit */
|
||||
flash_unlock(&flash_info[i],i);
|
||||
break;
|
||||
|
||||
default:
|
||||
panic ("configured too many flash banks!\n");
|
||||
break;
|
||||
}
|
||||
size += flash_info[i].size;
|
||||
}
|
||||
|
||||
#ifdef CFG_ENV_IS_IN_FLASH
|
||||
/* Protect monitor and environment sectors
|
||||
*/
|
||||
flash_protect (FLAG_PROTECT_SET,
|
||||
CFG_FLASH_BASE,
|
||||
CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
|
||||
|
||||
flash_protect (FLAG_PROTECT_SET,
|
||||
CFG_ENV_ADDR,
|
||||
CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
|
||||
#endif
|
||||
return size;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
void flash_unlock(flash_info_t * info, int bank)
|
||||
{
|
||||
int j;
|
||||
if (!bank)
|
||||
j=2; /* leave 0,1 locked for boot bank */
|
||||
else
|
||||
j=0; /* get the whole bank for #2 */
|
||||
|
||||
for (;j<CFG_MAX_FLASH_SECT;j++) {
|
||||
FPWV *addr = (FPWV *) (info->start[j]);
|
||||
if (addr == NULL) {
|
||||
printf("Warning Flash probe failed\n");
|
||||
break;
|
||||
}
|
||||
flash_unprotect_sectors (addr);
|
||||
*addr = (FPW) 0x00500050;/* clear status register */
|
||||
*addr = (FPW) 0x00FF00FF;/* resest to read mode */
|
||||
}
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
static void flash_get_offsets (ulong base, flash_info_t * info)
|
||||
{
|
||||
int i;
|
||||
volatile int r; /* gcc 3.4.0-1 strangeness, need to follow up.*/
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
return;
|
||||
}
|
||||
|
||||
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
|
||||
for (i = 0; i < info->sector_count; i++) {
|
||||
if (i > 254) { /* 255,256,257,258 */
|
||||
r=i;
|
||||
info->start[i] = base + (((r-(int)255) * SZ_32K) + (255*PHYS_FLASH_SECT_SIZE));
|
||||
info->protect[i] = 0;
|
||||
} else {
|
||||
info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
|
||||
info->protect[i] = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
void flash_print_info (flash_info_t * info)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
printf ("missing or unknown FLASH type\n");
|
||||
return;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) {
|
||||
case FLASH_MAN_INTEL:
|
||||
printf ("INTEL ");
|
||||
break;
|
||||
default:
|
||||
printf ("Unknown Vendor ");
|
||||
break;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) {
|
||||
case FLASH_28F256L18T:
|
||||
printf ("FLASH 28F256L18T\n");
|
||||
break;
|
||||
default:
|
||||
printf ("Unknown Chip Type\n");
|
||||
break;
|
||||
}
|
||||
|
||||
printf (" Size: %ld MB in %d Sectors\n",
|
||||
info->size >> 20, info->sector_count);
|
||||
|
||||
printf (" Sector Start Addresses:");
|
||||
for (i = 0; i < info->sector_count; ++i) {
|
||||
if ((i % 5) == 0)
|
||||
printf ("\n ");
|
||||
printf (" %08lX%s",
|
||||
info->start[i], info->protect[i] ? " (RO)" : " ");
|
||||
}
|
||||
printf ("\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* The following code cannot be run from FLASH!
|
||||
*/
|
||||
static ulong flash_get_size (FPW * addr, flash_info_t * info)
|
||||
{
|
||||
volatile FPW value;
|
||||
/* mb(); this one makes ARM11 err go away, but I want it :) as a guide to problems */
|
||||
|
||||
/* Write auto select command: read Manufacturer ID */
|
||||
addr[0x5555] = (FPW) 0x00AA00AA;
|
||||
addr[0x2AAA] = (FPW) 0x00550055;
|
||||
addr[0x5555] = (FPW) 0x00900090;
|
||||
|
||||
mb ();
|
||||
value = addr[0] & 0xFF; /* just looking for 89 (8989 is hw pat)*/
|
||||
|
||||
switch (value) {
|
||||
|
||||
case (FPW) INTEL_MANUFACT:
|
||||
info->flash_id = FLASH_MAN_INTEL;
|
||||
break;
|
||||
|
||||
default:
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
info->sector_count = 0;
|
||||
info->size = 0;
|
||||
addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
|
||||
return(0); /* no or unknown flash */
|
||||
}
|
||||
|
||||
mb ();
|
||||
value = addr[1]; /* device ID */
|
||||
switch (value) {
|
||||
|
||||
case (FPW) (INTEL_ID_28F256L18T): /* 880D */
|
||||
info->flash_id += FLASH_28F256L18T;
|
||||
info->sector_count = 259; /*0-258*/
|
||||
info->size = SZ_32M;
|
||||
break; /* => 32 MB */
|
||||
|
||||
default:
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
break;
|
||||
}
|
||||
|
||||
if (info->sector_count > CFG_MAX_FLASH_SECT) {
|
||||
printf ("** ERROR: sector count %d > max (%d) **\n",
|
||||
info->sector_count, CFG_MAX_FLASH_SECT);
|
||||
info->sector_count = CFG_MAX_FLASH_SECT;
|
||||
}
|
||||
|
||||
addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
|
||||
|
||||
return(info->size);
|
||||
}
|
||||
|
||||
|
||||
/* unprotects a sector for write and erase
|
||||
* on some intel parts, this unprotects the entire chip, but it
|
||||
* wont hurt to call this additional times per sector...
|
||||
*/
|
||||
void flash_unprotect_sectors (FPWV * addr)
|
||||
{
|
||||
#define PD_FINTEL_WSMS_READY_MASK 0x0080
|
||||
|
||||
*addr = (FPW) 0x00500050; /* clear status register */
|
||||
|
||||
/* this sends the clear lock bit command */
|
||||
*addr = (FPW) 0x00600060;
|
||||
*addr = (FPW) 0x00D000D0;
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
int flash_erase (flash_info_t * info, int s_first, int s_last)
|
||||
{
|
||||
int prot, sect;
|
||||
ulong type, start, last;
|
||||
int rcode = 0;
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
int iflag;
|
||||
#endif
|
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) {
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
printf ("- missing\n");
|
||||
} else {
|
||||
printf ("- no sectors to erase\n");
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
type = (info->flash_id & FLASH_VENDMASK);
|
||||
if ((type != FLASH_MAN_INTEL)) {
|
||||
printf ("Can't erase unknown flash type %08lx - aborted\n",
|
||||
info->flash_id);
|
||||
return 1;
|
||||
}
|
||||
|
||||
prot = 0;
|
||||
for (sect = s_first; sect <= s_last; ++sect) {
|
||||
if (info->protect[sect]) {
|
||||
prot++;
|
||||
}
|
||||
}
|
||||
|
||||
if (prot) {
|
||||
printf ("- Warning: %d protected sectors will not be erased!\n",
|
||||
prot);
|
||||
} else {
|
||||
printf ("\n");
|
||||
}
|
||||
|
||||
|
||||
start = get_timer (0);
|
||||
last = start;
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
iflag = disable_interrupts ();
|
||||
#endif
|
||||
|
||||
/* Start erase on unprotected sectors */
|
||||
for (sect = s_first; sect <= s_last; sect++) {
|
||||
if (info->protect[sect] == 0) { /* not protected */
|
||||
FPWV *addr = (FPWV *) (info->start[sect]);
|
||||
FPW status;
|
||||
|
||||
printf ("Erasing sector %2d ... ", sect);
|
||||
|
||||
flash_unprotect_sectors (addr);
|
||||
|
||||
/* arm simple, non interrupt dependent timer */
|
||||
reset_timer_masked ();
|
||||
|
||||
*addr = (FPW) 0x00500050;/* clear status register */
|
||||
*addr = (FPW) 0x00200020;/* erase setup */
|
||||
*addr = (FPW) 0x00D000D0;/* erase confirm */
|
||||
|
||||
while (((status =
|
||||
*addr) & (FPW) 0x00800080) !=
|
||||
(FPW) 0x00800080) {
|
||||
if (get_timer_masked () >
|
||||
CFG_FLASH_ERASE_TOUT) {
|
||||
printf ("Timeout\n");
|
||||
/* suspend erase */
|
||||
*addr = (FPW) 0x00B000B0;
|
||||
/* reset to read mode */
|
||||
*addr = (FPW) 0x00FF00FF;
|
||||
rcode = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* clear status register cmd. */
|
||||
*addr = (FPW) 0x00500050;
|
||||
*addr = (FPW) 0x00FF00FF;/* resest to read mode */
|
||||
printf (" done\n");
|
||||
}
|
||||
}
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
if (iflag)
|
||||
enable_interrupts();
|
||||
#endif
|
||||
|
||||
return rcode;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
* 4 - Flash not identified
|
||||
*/
|
||||
|
||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong cp, wp;
|
||||
FPW data;
|
||||
int count, i, l, rc, port_width;
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
return 4;
|
||||
}
|
||||
/* get lower word aligned address */
|
||||
#ifdef FLASH_PORT_WIDTH16
|
||||
wp = (addr & ~1);
|
||||
port_width = 2;
|
||||
#else
|
||||
wp = (addr & ~3);
|
||||
port_width = 4;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* handle unaligned start bytes
|
||||
*/
|
||||
if ((l = addr - wp) != 0) {
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < l; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *) cp);
|
||||
}
|
||||
for (; i < port_width && cnt > 0; ++i) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
++cp;
|
||||
}
|
||||
for (; cnt == 0 && i < port_width; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *) cp);
|
||||
}
|
||||
|
||||
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
|
||||
return(rc);
|
||||
}
|
||||
wp += port_width;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle word aligned part
|
||||
*/
|
||||
count = 0;
|
||||
while (cnt >= port_width) {
|
||||
data = 0;
|
||||
for (i = 0; i < port_width; ++i) {
|
||||
data = (data << 8) | *src++;
|
||||
}
|
||||
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
|
||||
return(rc);
|
||||
}
|
||||
wp += port_width;
|
||||
cnt -= port_width;
|
||||
if (count++ > 0x800) {
|
||||
spin_wheel ();
|
||||
count = 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (cnt == 0) {
|
||||
return(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* handle unaligned tail bytes
|
||||
*/
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
}
|
||||
for (; i < port_width; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *) cp);
|
||||
}
|
||||
|
||||
return(write_data (info, wp, SWAP (data)));
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word or halfword to Flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
static int write_data (flash_info_t * info, ulong dest, FPW data)
|
||||
{
|
||||
FPWV *addr = (FPWV *) dest;
|
||||
ulong status;
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
int iflag;
|
||||
#endif
|
||||
|
||||
/* Check if Flash is (sufficiently) erased */
|
||||
if ((*addr & data) != data) {
|
||||
printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
|
||||
return(2);
|
||||
}
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
iflag = disable_interrupts ();
|
||||
#endif
|
||||
*addr = (FPW) 0x00400040; /* write setup */
|
||||
*addr = data;
|
||||
|
||||
/* arm simple, non interrupt dependent timer */
|
||||
reset_timer_masked ();
|
||||
|
||||
/* wait while polling the status register */
|
||||
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
|
||||
if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
|
||||
*addr = (FPW) 0x00FF00FF; /* restore read mode */
|
||||
return(1);
|
||||
}
|
||||
}
|
||||
*addr = (FPW) 0x00FF00FF; /* restore read mode */
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
if (iflag)
|
||||
enable_interrupts();
|
||||
#endif
|
||||
|
||||
return(0);
|
||||
}
|
||||
|
||||
void inline spin_wheel (void)
|
||||
{
|
||||
static int p = 0;
|
||||
static char w[] = "\\/-";
|
||||
|
||||
printf ("\010%c", w[p]);
|
||||
(++p == 3) ? (p = 0) : 0;
|
||||
}
|
||||
@ -30,6 +30,7 @@
|
||||
#include <spd_sdram.h>
|
||||
#include <status_led.h>
|
||||
#include <sha1.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
@ -867,6 +868,29 @@ U_BOOT_CMD(
|
||||
);
|
||||
#endif
|
||||
|
||||
#if defined (CONFIG_CMD_IDE)
|
||||
/* These addresses need to be shifted one place to the left
|
||||
* ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
|
||||
* These values are shifted
|
||||
*/
|
||||
extern ulong *ide_bus_offset;
|
||||
void inline ide_outb(int dev, int port, unsigned char val)
|
||||
{
|
||||
debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
|
||||
dev, port, val, (ATA_CURR_BASE(dev)+port));
|
||||
|
||||
out_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)), val);
|
||||
}
|
||||
unsigned char inline ide_inb(int dev, int port)
|
||||
{
|
||||
uchar val;
|
||||
val = in_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)));
|
||||
debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
|
||||
dev, port, (ATA_CURR_BASE(dev)+port), val);
|
||||
return (val);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IDE_PREINIT
|
||||
int ide_preinit (void)
|
||||
{
|
||||
|
||||
@ -31,6 +31,7 @@
|
||||
#include <command.h>
|
||||
#include <image.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
|
||||
# include <pcmcia.h>
|
||||
@ -128,8 +129,6 @@ ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
|
||||
};
|
||||
|
||||
|
||||
#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
|
||||
|
||||
#ifndef CONFIG_AMIGAONEG3SE
|
||||
static int ide_bus_ok[CFG_IDE_MAXBUS];
|
||||
#else
|
||||
@ -172,8 +171,8 @@ static uchar ide_wait (int dev, ulong t);
|
||||
|
||||
#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
|
||||
|
||||
static void __inline__ ide_outb(int dev, int port, unsigned char val);
|
||||
static unsigned char __inline__ ide_inb(int dev, int port);
|
||||
void inline ide_outb(int dev, int port, unsigned char val);
|
||||
unsigned char inline ide_inb(int dev, int port);
|
||||
static void input_data(int dev, ulong *sect_buf, int words);
|
||||
static void output_data(int dev, ulong *sect_buf, int words);
|
||||
static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
|
||||
@ -805,45 +804,27 @@ set_pcmcia_timing (int pmode)
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
|
||||
static void __inline__
|
||||
ide_outb(int dev, int port, unsigned char val)
|
||||
void inline
|
||||
__ide_outb(int dev, int port, unsigned char val)
|
||||
{
|
||||
debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
|
||||
dev, port, val, (ATA_CURR_BASE(dev)+port));
|
||||
|
||||
/* Ensure I/O operations complete */
|
||||
EIEIO;
|
||||
*((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port))) = val;
|
||||
dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
|
||||
outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
|
||||
}
|
||||
#else /* ! __PPC__ */
|
||||
static void __inline__
|
||||
ide_outb(int dev, int port, unsigned char val)
|
||||
{
|
||||
outb(val, ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
|
||||
}
|
||||
#endif /* __PPC__ */
|
||||
void inline ide_outb (int dev, int port, unsigned char val)
|
||||
__attribute__((weak, alias("__ide_outb")));
|
||||
|
||||
|
||||
#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
|
||||
static unsigned char __inline__
|
||||
ide_inb(int dev, int port)
|
||||
unsigned char inline
|
||||
__ide_inb(int dev, int port)
|
||||
{
|
||||
uchar val;
|
||||
/* Ensure I/O operations complete */
|
||||
EIEIO;
|
||||
val = *((u16 *)(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
|
||||
val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
|
||||
debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
|
||||
dev, port, (ATA_CURR_BASE(dev)+port), val);
|
||||
return (val);
|
||||
dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val);
|
||||
return val;
|
||||
}
|
||||
#else /* ! __PPC__ */
|
||||
static unsigned char __inline__
|
||||
ide_inb(int dev, int port)
|
||||
{
|
||||
return inb(ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port));
|
||||
}
|
||||
#endif /* __PPC__ */
|
||||
unsigned char inline ide_inb(int dev, int port)
|
||||
__attribute__((weak, alias("__ide_inb")));
|
||||
|
||||
#ifdef __PPC__
|
||||
# ifdef CONFIG_AMIGAONEG3SE
|
||||
|
||||
@ -107,13 +107,6 @@ int env_init(void)
|
||||
ulong addr1 = (ulong)&(flash_addr->data);
|
||||
ulong addr2 = (ulong)&(flash_addr_new->data);
|
||||
|
||||
#ifdef CONFIG_OMAP2420H4
|
||||
int flash_probe(void);
|
||||
|
||||
if(flash_probe() == 0)
|
||||
goto bad_flash;
|
||||
#endif
|
||||
|
||||
crc1_ok = (crc32(0, flash_addr->data, ENV_SIZE) == flash_addr->crc);
|
||||
crc2_ok = (crc32(0, flash_addr_new->data, ENV_SIZE) == flash_addr_new->crc);
|
||||
|
||||
@ -143,9 +136,6 @@ int env_init(void)
|
||||
gd->env_valid = 2;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OMAP2420H4
|
||||
bad_flash:
|
||||
#endif
|
||||
return (0);
|
||||
}
|
||||
|
||||
@ -259,20 +249,12 @@ Done:
|
||||
|
||||
int env_init(void)
|
||||
{
|
||||
#ifdef CONFIG_OMAP2420H4
|
||||
int flash_probe(void);
|
||||
|
||||
if(flash_probe() == 0)
|
||||
goto bad_flash;
|
||||
#endif
|
||||
if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
|
||||
gd->env_addr = (ulong)&(env_ptr->data);
|
||||
gd->env_valid = 1;
|
||||
return(0);
|
||||
}
|
||||
#ifdef CONFIG_OMAP2420H4
|
||||
bad_flash:
|
||||
#endif
|
||||
|
||||
gd->env_addr = (ulong)&default_environment[0];
|
||||
gd->env_valid = 0;
|
||||
return (0);
|
||||
|
||||
@ -54,11 +54,19 @@ int ide_preinit (void)
|
||||
/* All sample codes do that... */
|
||||
*(vu_long *) MPC5XXX_ATA_SHARE_COUNT = 0;
|
||||
|
||||
#if defined(CONFIG_UC101)
|
||||
/* Configure and reset host */
|
||||
*(vu_long *) MPC5XXX_ATA_HOST_CONFIG =
|
||||
MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR;
|
||||
udelay (10);
|
||||
*(vu_long *) MPC5XXX_ATA_HOST_CONFIG = 0;
|
||||
#else
|
||||
/* Configure and reset host */
|
||||
*(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY |
|
||||
MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR;
|
||||
udelay (10);
|
||||
*(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY;
|
||||
#endif
|
||||
|
||||
/* Disable prefetch on Commbus */
|
||||
psdma->PtdCntrl |= 1;
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
|
||||
#include <mpc5xxx.h>
|
||||
|
||||
int usb_cpu_init()
|
||||
int usb_cpu_init(void)
|
||||
{
|
||||
/* Set the USB Clock */
|
||||
*(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
|
||||
@ -41,12 +41,12 @@ int usb_cpu_init()
|
||||
return 0;
|
||||
}
|
||||
|
||||
int usb_cpu_stop()
|
||||
int usb_cpu_stop(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int usb_cpu_init_fail()
|
||||
int usb_cpu_init_fail(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -247,7 +247,7 @@ int cpu_init_r(void)
|
||||
switch (cache_ctl & 0x30000000) {
|
||||
case 0x20000000:
|
||||
if (ver == SVR_8548 || ver == SVR_8548_E ||
|
||||
ver == SVR_8544) {
|
||||
ver == SVR_8544 || ver == SVR_8568_E) {
|
||||
printf ("L2 cache 512KB:");
|
||||
/* set L2E=1, L2I=1, & L2SRAM=0 */
|
||||
cache_ctl = 0xc0000000;
|
||||
|
||||
@ -303,8 +303,8 @@ eth_init(bd_t * bd)
|
||||
for (i = 0; i < 6; i++)
|
||||
((u16 *) bd->bi_enetaddr)[i] = read_srom_word(i);
|
||||
|
||||
if (!is_zero_ether_addr(bd->bi_enetaddr) &&
|
||||
!is_mutlicast_ether_addr(bd->bi_enetaddr)) {
|
||||
if (is_zero_ether_addr(bd->bi_enetaddr) ||
|
||||
is_multicast_ether_addr(bd->bi_enetaddr)) {
|
||||
/* try reading from environment */
|
||||
u8 i;
|
||||
char *s, *e;
|
||||
@ -542,7 +542,7 @@ read_srom_word(int offset)
|
||||
{
|
||||
DM9000_iow(DM9000_EPAR, offset);
|
||||
DM9000_iow(DM9000_EPCR, 0x4);
|
||||
udelay(200);
|
||||
udelay(8000);
|
||||
DM9000_iow(DM9000_EPCR, 0x0);
|
||||
return (DM9000_ior(DM9000_EPDRL) + (DM9000_ior(DM9000_EPDRH) << 8));
|
||||
}
|
||||
|
||||
@ -130,9 +130,14 @@ fsl_pci_init(struct pci_controller *hose)
|
||||
|
||||
}
|
||||
|
||||
/* Call setup to allocate PCSRBAR window */
|
||||
pciauto_setup_device(hose, dev, 1, hose->pci_mem,
|
||||
/* Use generic setup_device to initialize standard pci regs,
|
||||
* but do not allocate any windows since any BAR found (such
|
||||
* as PCSRBAR) is not in this cpu's memory space.
|
||||
*/
|
||||
|
||||
pciauto_setup_device(hose, dev, 0, hose->pci_mem,
|
||||
hose->pci_prefetch, hose->pci_io);
|
||||
|
||||
#ifndef CONFIG_PCI_NOSCAN
|
||||
printf (" Scanning PCI bus %02x\n", hose->current_busno);
|
||||
hose->last_busno = pci_hose_scan_bus(hose,hose->current_busno);
|
||||
|
||||
@ -669,7 +669,7 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
|
||||
ed_p = &(((ed_t *)ed_p)->hwNextED))
|
||||
inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
|
||||
ed->hwNextED = *ed_p;
|
||||
*ed_p = m32_swap(ed);
|
||||
*ed_p = m32_swap((unsigned long)ed);
|
||||
}
|
||||
break;
|
||||
}
|
||||
@ -687,11 +687,11 @@ static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
|
||||
|
||||
/* ED might have been unlinked through another path */
|
||||
while (*ed_p != 0) {
|
||||
if (((struct ed *)m32_swap (ed_p)) == ed) {
|
||||
if (((struct ed *)m32_swap ((unsigned long)ed_p)) == ed) {
|
||||
*ed_p = ed->hwNextED;
|
||||
break;
|
||||
}
|
||||
ed_p = & (((struct ed *)m32_swap (ed_p))->hwNextED);
|
||||
ed_p = & (((struct ed *)m32_swap ((unsigned long)ed_p))->hwNextED);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -13,6 +13,9 @@
|
||||
#define SIO_CONFIG_RA 0x398
|
||||
#define SIO_CONFIG_RD 0x399
|
||||
|
||||
#ifndef _IO_BASE
|
||||
#define _IO_BASE 0
|
||||
#endif
|
||||
|
||||
#define readb(addr) in_8((volatile u8 *)(addr))
|
||||
#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
|
||||
|
||||
@ -565,7 +565,7 @@ ulong bootcount_load (void);
|
||||
#define BOOTCOUNT_MAGIC 0xB001C041
|
||||
|
||||
/* $(CPU)/.../<eth> */
|
||||
/*void mii_init (void);*/
|
||||
void mii_init (void);
|
||||
|
||||
/* $(CPU)/.../lcd.c */
|
||||
ulong lcd_setmem (ulong);
|
||||
|
||||
@ -181,9 +181,6 @@
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,5200@0"
|
||||
#define OF_SOC "soc5200@f0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
@ -231,9 +231,6 @@
|
||||
#define CONFIG_OF_LIBFDT 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8313@0"
|
||||
#define OF_SOC "soc8313@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
@ -321,9 +321,6 @@
|
||||
#define CONFIG_OF_LIBFDT 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8323@0"
|
||||
#define OF_SOC "soc8323@e0000000"
|
||||
#define OF_QE "qe@e0100000"
|
||||
|
||||
@ -342,9 +342,6 @@
|
||||
#define CONFIG_OF_LIBFDT 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8349@0"
|
||||
#define OF_SOC "soc8349@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
@ -299,9 +299,6 @@ boards, we say we have two, but don't display a message if we find only one. */
|
||||
#define CONFIG_OF_LIBFDT 1
|
||||
#define CONFIG_OF_BOARD_SETUP
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8349@0"
|
||||
#define OF_SOC "soc8349@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
@ -351,10 +351,6 @@
|
||||
#define CONFIG_OF_HAS_BD_T 1
|
||||
#define CONFIG_OF_HAS_UBOOT_ENV 1
|
||||
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8360@0"
|
||||
#define OF_SOC "soc8360@e0000000"
|
||||
#define OF_QE "qe@e0100000"
|
||||
|
||||
@ -301,9 +301,6 @@
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8540@0"
|
||||
#define OF_SOC "soc8540@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 8)
|
||||
|
||||
@ -312,9 +312,6 @@ extern unsigned long get_clock_freq(void);
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8541@0"
|
||||
#define OF_SOC "soc8541@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 8)
|
||||
|
||||
@ -181,6 +181,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
||||
#define CFG_BR3_PRELIM 0xf8100801 /* port size 8bit */
|
||||
#define CFG_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/
|
||||
|
||||
#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
|
||||
#define PIXIS_BASE 0xf8100000 /* PIXIS registers */
|
||||
#define PIXIS_ID 0x0 /* Board ID at offset 0 */
|
||||
#define PIXIS_VER 0x1 /* Board version at offset 1 */
|
||||
@ -252,9 +253,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8544@0"
|
||||
#define OF_SOC "soc8544@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 8)
|
||||
|
||||
@ -336,9 +336,6 @@ extern unsigned long get_clock_freq(void);
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8548@0"
|
||||
#define OF_SOC "soc8548@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 8)
|
||||
@ -636,7 +633,6 @@ extern unsigned long get_clock_freq(void);
|
||||
#define ENET_ENV ""
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"netdev=eth0\0" \
|
||||
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
|
||||
@ -649,8 +645,8 @@ extern unsigned long get_clock_freq(void);
|
||||
"consoledev=ttyS1\0" \
|
||||
"ramdiskaddr=2000000\0" \
|
||||
"ramdiskfile=ramdisk.uboot\0" \
|
||||
"dtbaddr=c00000\0" \
|
||||
"dtbfile=mpc8548cds.dtb\0" \
|
||||
"fdtaddr=c00000\0" \
|
||||
"fdtfile=mpc8548cds.dtb\0" \
|
||||
"eoi=mw e00400b0 0\0" \
|
||||
"iack=md e00400a0 1\0" \
|
||||
"ddrreg=md ${a}000 8; md ${a}080 8;md ${a}100 d; md ${a}140 4; md ${a}bf0 4;" \
|
||||
@ -672,8 +668,6 @@ extern unsigned long get_clock_freq(void);
|
||||
PCI_ENV1 \
|
||||
PCI_ENV2 \
|
||||
ENET_ENV
|
||||
#endif
|
||||
|
||||
|
||||
#define CONFIG_NFSBOOTCOMMAND \
|
||||
"setenv bootargs root=/dev/nfs rw " \
|
||||
@ -681,8 +675,8 @@ extern unsigned long get_clock_freq(void);
|
||||
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
|
||||
"console=$consoledev,$baudrate $othbootargs;" \
|
||||
"tftp $loadaddr $bootfile;" \
|
||||
"tftp $dtbaddr $dtbfile;" \
|
||||
"bootm $loadaddr - $dtbaddr"
|
||||
"tftp $fdtaddr $fdtfile;" \
|
||||
"bootm $loadaddr - $fdtaddr"
|
||||
|
||||
|
||||
#define CONFIG_RAMBOOTCOMMAND \
|
||||
@ -690,8 +684,8 @@ extern unsigned long get_clock_freq(void);
|
||||
"console=$consoledev,$baudrate $othbootargs;" \
|
||||
"tftp $ramdiskaddr $ramdiskfile;" \
|
||||
"tftp $loadaddr $bootfile;" \
|
||||
"tftp $dtbaddr $dtbfile;" \
|
||||
"bootm $loadaddr $ramdiskaddr $dtbaddr"
|
||||
"tftp $fdtaddr $fdtfile;" \
|
||||
"bootm $loadaddr $ramdiskaddr $fdtaddr"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
|
||||
|
||||
|
||||
@ -312,9 +312,6 @@ extern unsigned long get_clock_freq(void);
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8555@0"
|
||||
#define OF_SOC "soc8555@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 8)
|
||||
|
||||
@ -292,9 +292,6 @@
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8560@0"
|
||||
#define OF_SOC "soc8560@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 8)
|
||||
|
||||
@ -63,7 +63,7 @@ extern unsigned long get_clock_freq(void);
|
||||
/*
|
||||
* These can be toggled for performance analysis, otherwise use default.
|
||||
*/
|
||||
/*#define CONFIG_L2_CACHE*/ /* toggle L2 cache */
|
||||
#define CONFIG_L2_CACHE /* toggle L2 cache */
|
||||
#define CONFIG_BTB /* toggle branch predition */
|
||||
#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
|
||||
|
||||
@ -293,9 +293,6 @@ extern unsigned long get_clock_freq(void);
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8568@0"
|
||||
#define OF_SOC "soc8568@e0000000"
|
||||
#define OF_QE "qe@e0080000"
|
||||
|
||||
@ -185,6 +185,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
||||
#define CFG_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/
|
||||
|
||||
|
||||
#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
|
||||
#define PIXIS_BASE 0xf8100000 /* PIXIS registers */
|
||||
#define PIXIS_ID 0x0 /* Board ID at offset 0 */
|
||||
#define PIXIS_VER 0x1 /* Board version at offset 1 */
|
||||
@ -268,9 +269,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8641@0"
|
||||
#define OF_SOC "soc8641@f8000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
@ -704,8 +704,6 @@
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
#define OF_CPU "PowerPC,5200@0"
|
||||
#define OF_SOC "soc5200@f0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
@ -59,6 +59,8 @@
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#undef CONFIG_CMD_NET /* disabeled - causes compile errors */
|
||||
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_LOADB
|
||||
#define CONFIG_CMD_REGINFO
|
||||
|
||||
@ -148,9 +148,6 @@
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,5200@0"
|
||||
#define OF_SOC "soc5200@f0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 8)
|
||||
|
||||
@ -420,8 +420,6 @@ extern void __led_set(led_id_t id, int state);
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
#define OF_CPU "PowerPC,5200@0"
|
||||
#define OF_SOC "soc5200@f0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
@ -80,9 +80,6 @@
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,7448@0"
|
||||
#define OF_TSI "tsi108@c0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 8)
|
||||
|
||||
@ -266,7 +266,10 @@
|
||||
#define CONFIG_CMD_DIAG
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_ELF
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_I2C
|
||||
#define CONFIG_CMD_IDE
|
||||
#define CONFIG_CMD_IRQ
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_NET
|
||||
@ -274,12 +277,10 @@
|
||||
#define CONFIG_CMD_PCI
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_REGINFO
|
||||
#define CONFIG_CMD_REISER
|
||||
#define CONFIG_CMD_SDRAM
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_USB
|
||||
|
||||
|
||||
#define CONFIG_SUPPORT_VFAT
|
||||
|
||||
/*
|
||||
@ -488,10 +489,4 @@
|
||||
/* Offset for alternate registers */
|
||||
#define CFG_ATA_ALT_OFFSET (0x0000)
|
||||
|
||||
/* These addresses need to be shifted one place to the left
|
||||
* ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
|
||||
* These values are shifted
|
||||
*/
|
||||
#define CFG_ATA_PORT_ADDR(port) ((port) << 1)
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
@ -313,9 +313,6 @@
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8349@0"
|
||||
#define OF_SOC "soc8349@e0000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
@ -270,9 +270,6 @@
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,8641@0"
|
||||
#define OF_SOC "soc@f8000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
|
||||
@ -592,9 +592,6 @@ typedef unsigned int led_id_t;
|
||||
/* pass open firmware flat tree */
|
||||
#define CONFIG_OF_FLAT_TREE 1
|
||||
|
||||
/* maximum size of the flat tree (8K) */
|
||||
#define OF_FLAT_TREE_MAX_SIZE 8192
|
||||
|
||||
#define OF_CPU "PowerPC,MPC870@0"
|
||||
#define OF_TBCLK (MPC8XX_HZ / 16)
|
||||
#define CONFIG_OF_HAS_BD_T 1
|
||||
|
||||
@ -332,7 +332,6 @@
|
||||
#define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
|
||||
|
||||
#define CONFIG_IDE_PREINIT 1
|
||||
/* #define CONFIG_IDE_RESET 1 beispile siehe tqm5200.c */
|
||||
|
||||
#define CFG_ATA_IDE0_OFFSET 0x0000
|
||||
|
||||
|
||||
@ -26,6 +26,8 @@
|
||||
|
||||
#define IDE_BUS(dev) (dev >> 1)
|
||||
|
||||
#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
|
||||
|
||||
#ifdef CONFIG_IDE_LED
|
||||
|
||||
/*
|
||||
|
||||
@ -69,75 +69,75 @@ typedef enum {
|
||||
#include <s3c24x0.h>
|
||||
|
||||
|
||||
static inline S3C24X0_MEMCTL * const S3C24X0_GetBase_MEMCTL(void)
|
||||
static inline S3C24X0_MEMCTL * S3C24X0_GetBase_MEMCTL(void)
|
||||
{
|
||||
return (S3C24X0_MEMCTL * const)S3C24X0_MEMCTL_BASE;
|
||||
}
|
||||
static inline S3C24X0_USB_HOST * const S3C24X0_GetBase_USB_HOST(void)
|
||||
static inline S3C24X0_USB_HOST * S3C24X0_GetBase_USB_HOST(void)
|
||||
{
|
||||
return (S3C24X0_USB_HOST * const)S3C24X0_USB_HOST_BASE;
|
||||
}
|
||||
static inline S3C24X0_INTERRUPT * const S3C24X0_GetBase_INTERRUPT(void)
|
||||
static inline S3C24X0_INTERRUPT * S3C24X0_GetBase_INTERRUPT(void)
|
||||
{
|
||||
return (S3C24X0_INTERRUPT * const)S3C24X0_INTERRUPT_BASE;
|
||||
}
|
||||
static inline S3C24X0_DMAS * const S3C24X0_GetBase_DMAS(void)
|
||||
static inline S3C24X0_DMAS * S3C24X0_GetBase_DMAS(void)
|
||||
{
|
||||
return (S3C24X0_DMAS * const)S3C24X0_DMA_BASE;
|
||||
}
|
||||
static inline S3C24X0_CLOCK_POWER * const S3C24X0_GetBase_CLOCK_POWER(void)
|
||||
static inline S3C24X0_CLOCK_POWER * S3C24X0_GetBase_CLOCK_POWER(void)
|
||||
{
|
||||
return (S3C24X0_CLOCK_POWER * const)S3C24X0_CLOCK_POWER_BASE;
|
||||
}
|
||||
static inline S3C24X0_LCD * const S3C24X0_GetBase_LCD(void)
|
||||
static inline S3C24X0_LCD * S3C24X0_GetBase_LCD(void)
|
||||
{
|
||||
return (S3C24X0_LCD * const)S3C24X0_LCD_BASE;
|
||||
}
|
||||
static inline S3C2410_NAND * const S3C2410_GetBase_NAND(void)
|
||||
static inline S3C2410_NAND * S3C2410_GetBase_NAND(void)
|
||||
{
|
||||
return (S3C2410_NAND * const)S3C2410_NAND_BASE;
|
||||
}
|
||||
static inline S3C24X0_UART * const S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
|
||||
static inline S3C24X0_UART * S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
|
||||
{
|
||||
return (S3C24X0_UART * const)(S3C24X0_UART_BASE + (nr * 0x4000));
|
||||
}
|
||||
static inline S3C24X0_TIMERS * const S3C24X0_GetBase_TIMERS(void)
|
||||
static inline S3C24X0_TIMERS * S3C24X0_GetBase_TIMERS(void)
|
||||
{
|
||||
return (S3C24X0_TIMERS * const)S3C24X0_TIMER_BASE;
|
||||
}
|
||||
static inline S3C24X0_USB_DEVICE * const S3C24X0_GetBase_USB_DEVICE(void)
|
||||
static inline S3C24X0_USB_DEVICE * S3C24X0_GetBase_USB_DEVICE(void)
|
||||
{
|
||||
return (S3C24X0_USB_DEVICE * const)S3C24X0_USB_DEVICE_BASE;
|
||||
}
|
||||
static inline S3C24X0_WATCHDOG * const S3C24X0_GetBase_WATCHDOG(void)
|
||||
static inline S3C24X0_WATCHDOG * S3C24X0_GetBase_WATCHDOG(void)
|
||||
{
|
||||
return (S3C24X0_WATCHDOG * const)S3C24X0_WATCHDOG_BASE;
|
||||
}
|
||||
static inline S3C24X0_I2C * const S3C24X0_GetBase_I2C(void)
|
||||
static inline S3C24X0_I2C * S3C24X0_GetBase_I2C(void)
|
||||
{
|
||||
return (S3C24X0_I2C * const)S3C24X0_I2C_BASE;
|
||||
}
|
||||
static inline S3C24X0_I2S * const S3C24X0_GetBase_I2S(void)
|
||||
static inline S3C24X0_I2S * S3C24X0_GetBase_I2S(void)
|
||||
{
|
||||
return (S3C24X0_I2S * const)S3C24X0_I2S_BASE;
|
||||
}
|
||||
static inline S3C24X0_GPIO * const S3C24X0_GetBase_GPIO(void)
|
||||
static inline S3C24X0_GPIO * S3C24X0_GetBase_GPIO(void)
|
||||
{
|
||||
return (S3C24X0_GPIO * const)S3C24X0_GPIO_BASE;
|
||||
}
|
||||
static inline S3C24X0_RTC * const S3C24X0_GetBase_RTC(void)
|
||||
static inline S3C24X0_RTC * S3C24X0_GetBase_RTC(void)
|
||||
{
|
||||
return (S3C24X0_RTC * const)S3C24X0_RTC_BASE;
|
||||
}
|
||||
static inline S3C2410_ADC * const S3C2410_GetBase_ADC(void)
|
||||
static inline S3C2410_ADC * S3C2410_GetBase_ADC(void)
|
||||
{
|
||||
return (S3C2410_ADC * const)S3C2410_ADC_BASE;
|
||||
}
|
||||
static inline S3C24X0_SPI * const S3C24X0_GetBase_SPI(void)
|
||||
static inline S3C24X0_SPI * S3C24X0_GetBase_SPI(void)
|
||||
{
|
||||
return (S3C24X0_SPI * const)S3C24X0_SPI_BASE;
|
||||
}
|
||||
static inline S3C2410_SDI * const S3C2410_GetBase_SDI(void)
|
||||
static inline S3C2410_SDI * S3C2410_GetBase_SDI(void)
|
||||
{
|
||||
return (S3C2410_SDI * const)S3C2410_SDI_BASE;
|
||||
}
|
||||
|
||||
10
net/tftp.c
10
net/tftp.c
@ -178,7 +178,7 @@ TftpSend (void)
|
||||
pkt += strlen((char *)pkt) + 1;
|
||||
/* try for more effic. blk size */
|
||||
pkt += sprintf((char *)pkt,"blksize%c%d%c",
|
||||
0,htons(TftpBlkSizeOption),0);
|
||||
0,TftpBlkSizeOption,0);
|
||||
#ifdef CONFIG_MCAST_TFTP
|
||||
/* Check all preconditions before even trying the option */
|
||||
if (!ProhibitMcast
|
||||
@ -276,8 +276,12 @@ TftpHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len)
|
||||
#endif
|
||||
TftpState = STATE_OACK;
|
||||
TftpServerPort = src;
|
||||
/* Check for 'blksize' option */
|
||||
for (i=0;i<len-8;i++) {
|
||||
/*
|
||||
* Check for 'blksize' option.
|
||||
* Careful: "i" is signed, "len" is unsigned, thus
|
||||
* something like "len-8" may give a *huge* number
|
||||
*/
|
||||
for (i=0; i+8<len; i++) {
|
||||
if (strcmp ((char*)pkt+i,"blksize") == 0) {
|
||||
TftpBlkSize = (unsigned short)
|
||||
simple_strtoul((char*)pkt+i+8,NULL,10);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user