mx25: Define default SoC input clock frequencies

Define default SoC input clock frequencies for i.MX25 in order to get rid of
duplicated definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Matthias Weisser <weisserm@arcor.de>
This commit is contained in:
Benoît Thébaudeau 2012-08-21 11:05:12 +00:00 committed by Stefano Babic
parent 82e1b543b5
commit 1b2080f338
5 changed files with 23 additions and 11 deletions

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@ -64,7 +64,7 @@ static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
static ulong imx_get_mpllclk(void) static ulong imx_get_mpllclk(void)
{ {
struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
ulong fref = 24000000; ulong fref = MXC_HCLK;
return imx_decode_pll(readl(&ccm->mpctl), fref); return imx_decode_pll(readl(&ccm->mpctl), fref);
} }

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@ -40,6 +40,7 @@
#include <div64.h> #include <div64.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -55,28 +56,27 @@ DECLARE_GLOBAL_DATA_PTR;
static inline unsigned long long tick_to_time(unsigned long long tick) static inline unsigned long long tick_to_time(unsigned long long tick)
{ {
tick *= CONFIG_SYS_HZ; tick *= CONFIG_SYS_HZ;
do_div(tick, CONFIG_MX25_CLK32); do_div(tick, MXC_CLK32);
return tick; return tick;
} }
static inline unsigned long long time_to_tick(unsigned long long time) static inline unsigned long long time_to_tick(unsigned long long time)
{ {
time *= CONFIG_MX25_CLK32; time *= MXC_CLK32;
do_div(time, CONFIG_SYS_HZ); do_div(time, CONFIG_SYS_HZ);
return time; return time;
} }
static inline unsigned long long us_to_tick(unsigned long long us) static inline unsigned long long us_to_tick(unsigned long long us)
{ {
us = us * CONFIG_MX25_CLK32 + 999999; us = us * MXC_CLK32 + 999999;
do_div(us, 1000000); do_div(us, 1000000);
return us; return us;
} }
#else #else
/* ~2% error */ /* ~2% error */
#define TICK_PER_TIME ((CONFIG_MX25_CLK32 + CONFIG_SYS_HZ / 2) / \ #define TICK_PER_TIME ((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
CONFIG_SYS_HZ) #define US_PER_TICK (1000000 / MXC_CLK32)
#define US_PER_TICK (1000000 / CONFIG_MX25_CLK32)
static inline unsigned long long tick_to_time(unsigned long long tick) static inline unsigned long long tick_to_time(unsigned long long tick)
{ {
@ -144,7 +144,7 @@ ulong get_timer_masked(void)
{ {
/* /*
* get_ticks() returns a long long (64 bit), it wraps in * get_ticks() returns a long long (64 bit), it wraps in
* 2^64 / CONFIG_MX25_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~ * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
* 5 * 10^6 days - long enough. * 5 * 10^6 days - long enough.
*/ */
@ -177,6 +177,6 @@ ulong get_tbclk(void)
{ {
ulong tbclk; ulong tbclk;
tbclk = CONFIG_MX25_CLK32; tbclk = MXC_CLK32;
return tbclk; return tbclk;
} }

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@ -26,6 +26,20 @@
#ifndef __ASM_ARCH_CLOCK_H #ifndef __ASM_ARCH_CLOCK_H
#define __ASM_ARCH_CLOCK_H #define __ASM_ARCH_CLOCK_H
#include <common.h>
#ifdef CONFIG_MX25_HCLK_FREQ
#define MXC_HCLK CONFIG_MX25_HCLK_FREQ
#else
#define MXC_HCLK 24000000
#endif
#ifdef CONFIG_MX25_CLK32
#define MXC_CLK32 CONFIG_MX25_CLK32
#else
#define MXC_CLK32 32768
#endif
enum mxc_clock { enum mxc_clock {
MXC_CSI_CLK, MXC_CSI_CLK,
MXC_EPIT_CLK, MXC_EPIT_CLK,

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@ -17,7 +17,6 @@
/* High Level Configuration Options */ /* High Level Configuration Options */
#define CONFIG_MX25_CLK32 32768 /* OSC32K frequency */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TEXT_BASE 0x81200000 #define CONFIG_SYS_TEXT_BASE 0x81200000

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@ -28,7 +28,6 @@
#define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_MX25 #define CONFIG_MX25
#define CONFIG_MX25_CLK32 32768 /* OSC32K frequency */
#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TEXT_BASE 0xA0000000 #define CONFIG_SYS_TEXT_BASE 0xA0000000