dm: sunxi: Add support for serial using driver model
Add a driver for the designware serial UART used on sunxi. This just redirects to the normal ns16550 driver. Add a stdout-path to the device tree so that the correct UART is chosen. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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@ -20,6 +20,10 @@
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model = "LinkSprite pcDuino3";
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model = "LinkSprite pcDuino3";
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compatible = "linksprite,pcduino3", "allwinner,sun7i-a20";
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compatible = "linksprite,pcduino3", "allwinner,sun7i-a20";
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chosen {
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stdout-path = &uart0;
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};
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soc@01c00000 {
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soc@01c00000 {
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mmc0: mmc@01c0f000 {
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mmc0: mmc@01c0f000 {
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pinctrl-names = "default";
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pinctrl-names = "default";
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@ -19,6 +19,7 @@ obj-$(CONFIG_ALTERA_UART) += altera_uart.o
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obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
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obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
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obj-$(CONFIG_ARM_DCC) += arm_dcc.o
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obj-$(CONFIG_ARM_DCC) += arm_dcc.o
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obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
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obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
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obj-$(CONFIG_DW_SERIAL) += serial_dw.o
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obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
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obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
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obj-$(CONFIG_MCFUART) += mcfuart.o
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obj-$(CONFIG_MCFUART) += mcfuart.o
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obj-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
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obj-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
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39
drivers/serial/serial_dw.c
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39
drivers/serial/serial_dw.c
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@ -0,0 +1,39 @@
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/*
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* Copyright (c) 2014 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <ns16550.h>
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#include <serial.h>
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static const struct udevice_id dw_serial_ids[] = {
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{ .compatible = "snps,dw-apb-uart" },
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{ }
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};
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static int dw_serial_ofdata_to_platdata(struct udevice *dev)
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{
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struct ns16550_platdata *plat = dev_get_platdata(dev);
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int ret;
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ret = ns16550_serial_ofdata_to_platdata(dev);
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if (ret)
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return ret;
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plat->clock = CONFIG_SYS_NS16550_CLK;
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return 0;
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}
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U_BOOT_DRIVER(serial_ns16550) = {
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.name = "serial_dw",
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.id = UCLASS_SERIAL,
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.of_match = dw_serial_ids,
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.ofdata_to_platdata = dw_serial_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
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.priv_auto_alloc_size = sizeof(struct NS16550),
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.probe = ns16550_serial_probe,
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.ops = &ns16550_serial_ops,
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};
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@ -30,6 +30,9 @@
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM)
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM)
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# define CONFIG_CMD_DM
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# define CONFIG_CMD_DM
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# define CONFIG_DM_GPIO
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# define CONFIG_DM_GPIO
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# define CONFIG_DM_SERIAL
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# define CONFIG_DW_SERIAL
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# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
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#endif
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#endif
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/*
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/*
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@ -41,13 +44,15 @@
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_SERIAL
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/* ns16550 reg in the low bits of cpu reg */
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/* ns16550 reg in the low bits of cpu reg */
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_CLK 24000000
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#define CONFIG_SYS_NS16550_CLK 24000000
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#define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
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#ifndef CONFIG_DM_SERIAL
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#define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
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# define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
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# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
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#define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
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# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
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#define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
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# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
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# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
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# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
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#endif
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/* DRAM Base */
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/* DRAM Base */
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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