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ColdFire: Add FEC Buffer descriptors in SRAM

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Add FEC Buffer descriptors and data buffer in SRAM for
faster execution and access.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This commit is contained in:
TsiChung Liew 2008-08-19 21:26:32 +00:00 committed by Ben Warren
parent 429be27ce1
commit 1803f7f91f
1 changed files with 36 additions and 6 deletions
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42
drivers/net/mcffec.c
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@ -66,6 +66,7 @@ struct fec_info_s fec_info[] = {
0, /* tx Index */
0, /* tx buffer */
0, /* initialized flag */
(struct fec_info_s *)-1,
},
#endif
#ifdef CFG_FEC1_IOBASE
@ -78,12 +79,17 @@ struct fec_info_s fec_info[] = {
0, /* duplex and speed */
0, /* phy name */
0, /* phy name init */
#ifdef CFG_FEC_BUF_USE_SRAM
(cbd_t *)DBUF_LENGTH, /* RX BD */
#else
0, /* RX BD */
#endif
0, /* TX BD */
0, /* rx Index */
0, /* tx Index */
0, /* tx buffer */
0, /* initialized flag */
(struct fec_info_s *)-1,
}
#endif
};
@ -106,10 +112,6 @@ extern int mcffec_miiphy_write(char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif
#ifdef CFG_UNIFY_CACHE
extern void icache_invalid(void);
#endif
void setFecDuplexSpeed(volatile fec_t * fecp, bd_t * bd, int dup_spd)
{
if ((dup_spd >> 16) == FULL) {
@ -172,16 +174,22 @@ int fec_send(struct eth_device *dev, volatile void *packet, int length)
/* Activate transmit Buffer Descriptor polling */
fecp->tdar = 0x01000000; /* Descriptor polling active */
/* FEC fix for MCF5275, FEC unable to initial transmit data packet.
#ifndef CFG_FEC_BUF_USE_SRAM
/*
* FEC unable to initial transmit data packet.
* A nop will ensure the descriptor polling active completed.
* CF Internal RAM has shorter cycle access than DRAM. If use
* DRAM as Buffer descriptor and data, a nop is a must.
* Affect only V2 and V3.
*/
#ifdef CONFIG_M5275
__asm__ ("nop");
#endif
#ifdef CFG_UNIFY_CACHE
icache_invalid();
#endif
j = 0;
while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
(j < MCFFEC_TOUT_LOOP)) {
@ -213,6 +221,8 @@ int fec_recv(struct eth_device *dev)
int length;
for (;;) {
#ifndef CFG_FEC_BUF_USE_SRAM
#endif
#ifdef CFG_UNIFY_CACHE
icache_invalid();
#endif
@ -557,6 +567,9 @@ int mcffec_initialize(bd_t * bis)
{
struct eth_device *dev;
int i;
#ifdef CFG_FEC_BUF_USE_SRAM
u32 tmp = CFG_INIT_RAM_ADDR + 0x1000;
#endif
for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
@ -577,6 +590,18 @@ int mcffec_initialize(bd_t * bis)
dev->recv = fec_recv;
/* setup Receive and Transmit buffer descriptor */
#ifdef CFG_FEC_BUF_USE_SRAM
fec_info[i].rxbd = (cbd_t *)((u32)fec_info[i].rxbd + tmp);
tmp = (u32)fec_info[i].rxbd;
fec_info[i].txbd =
(cbd_t *)((u32)fec_info[i].txbd + tmp +
(PKTBUFSRX * sizeof(cbd_t)));
tmp = (u32)fec_info[i].txbd;
fec_info[i].txbuf =
(char *)((u32)fec_info[i].txbuf + tmp +
(CFG_TX_ETH_BUFFER * sizeof(cbd_t)));
tmp = (u32)fec_info[i].txbuf;
#else
fec_info[i].rxbd =
(cbd_t *) memalign(CFG_CACHELINE_SIZE,
(PKTBUFSRX * sizeof(cbd_t)));
@ -585,6 +610,8 @@ int mcffec_initialize(bd_t * bis)
(TX_BUF_CNT * sizeof(cbd_t)));
fec_info[i].txbuf =
(char *)memalign(CFG_CACHELINE_SIZE, DBUF_LENGTH);
#endif
#ifdef ET_DEBUG
printf("rxbd %x txbd %x\n",
(int)fec_info[i].rxbd, (int)fec_info[i].txbd);
@ -598,7 +625,10 @@ int mcffec_initialize(bd_t * bis)
miiphy_register(dev->name,
mcffec_miiphy_read, mcffec_miiphy_write);
#endif
if (i > 0)
fec_info[i - 1].next = &fec_info[i];
}
fec_info[i - 1].next = &fec_info[0];
/* default speed */
bis->bi_ethspeed = 10;