net: sh-eth: Add support R8A7794

R8A7794 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7794.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This commit is contained in:
Nobuhiro Iwamatsu 2014-06-24 17:01:08 +09:00
parent 23f23f23d5
commit 172437472a
2 changed files with 7 additions and 4 deletions

View File

@ -413,7 +413,8 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
#if defined(CONFIG_CPU_SH7734) || defined(CONFIG_R8A7740) #if defined(CONFIG_CPU_SH7734) || defined(CONFIG_R8A7740)
sh_eth_write(eth, CONFIG_SH_ETHER_SH7734_MII, RMII_MII); sh_eth_write(eth, CONFIG_SH_ETHER_SH7734_MII, RMII_MII);
#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
defined(CONFIG_R8A7794)
sh_eth_write(eth, sh_eth_read(eth, RMIIMR) | 0x1, RMIIMR); sh_eth_write(eth, sh_eth_read(eth, RMIIMR) | 0x1, RMIIMR);
#endif #endif
/* Configure phy */ /* Configure phy */
@ -439,7 +440,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752) #elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
sh_eth_write(eth, 1, RTRATE); sh_eth_write(eth, 1, RTRATE);
#elif defined(CONFIG_CPU_SH7724) || defined(CONFIG_R8A7790) || \ #elif defined(CONFIG_CPU_SH7724) || defined(CONFIG_R8A7790) || \
defined(CONFIG_R8A7791) defined(CONFIG_R8A7791) || defined(CONFIG_R8A7794)
val = ECMR_RTM; val = ECMR_RTM;
#endif #endif
} else if (phy->speed == 10) { } else if (phy->speed == 10) {

View File

@ -358,7 +358,8 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
#elif defined(CONFIG_R8A7740) #elif defined(CONFIG_R8A7740)
#define SH_ETH_TYPE_GETHER #define SH_ETH_TYPE_GETHER
#define BASE_IO_ADDR 0xE9A00000 #define BASE_IO_ADDR 0xE9A00000
#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
defined(CONFIG_R8A7794)
#define SH_ETH_TYPE_ETHER #define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xEE700200 #define BASE_IO_ADDR 0xEE700200
#elif defined(CONFIG_R7S72100) #elif defined(CONFIG_R7S72100)
@ -569,7 +570,8 @@ enum FELIC_MODE_BIT {
ECMR_PRM = 0x00000001, ECMR_PRM = 0x00000001,
#ifdef CONFIG_CPU_SH7724 #ifdef CONFIG_CPU_SH7724
ECMR_RTM = 0x00000010, ECMR_RTM = 0x00000010,
#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
defined(CONFIG_R8A7794)
ECMR_RTM = 0x00000004, ECMR_RTM = 0x00000004,
#endif #endif