microblaze: exception: migrate MICROBLAZE_V5 to Kconfig

Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only
covers delay slot exception support.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Ovidiu Panait 2022-02-13 10:09:20 +02:00 committed by Michal Simek
parent 4fef0a7b7e
commit 1669b3d1a0
3 changed files with 10 additions and 4 deletions

View File

@ -40,7 +40,7 @@ void _hw_exception_handler (void)
case 0x7:
puts("Priviledged or stack protection violation exception\n");
break;
#ifdef MICROBLAZE_V5
#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP)
case 0x1000:
puts("Exception in delay slot\n");
break;

View File

@ -47,6 +47,15 @@ config XILINX_MICROBLAZE0_USR_EXCEP
the exception vector table. The user exception vector is located at
C_BASE_VECTORS + 0x8 address.
config XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP
bool "MicroBlaze delay slot exception support"
default y
help
Enable this option if the MicroBlaze processor supports exceptions
caused by delay slot instructions (processor version >= v5.00). When
enabled, the hw exception handler will print a message indicating
whether the exception was triggered by a delay slot instruction.
config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR
hex "Location of MicroBlaze vectors"
default 0x0

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@ -11,9 +11,6 @@
/* Microblaze is microblaze_0 */
#define XILINX_FSL_NUMBER 3
/* MicroBlaze CPU */
#define MICROBLAZE_V5 1
#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
/* uart */