arm: lpc32xx: switch SPL builds to driver model
For NXP LPC32xx boards the change enables SPL_DM option, this allows to use any driver model UART driver in SPL images, hence a restriction on HSUART in SPL image is removed and well as definitions for non-DM NS16550 driver, its DM version is used instead. Because SPL_DM requires malloc(), enable CONFIG_SPL_SYS_MALLOC_SIMPLE for LPC32xx boards. The change adds about 5KB to the resulting SPL image (for devkit3250 board SPL image is increased from 10672 to 15608 bytes). Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -43,7 +43,7 @@ void lpc32xx_uart_init(unsigned int uart_id)
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&clk->u3clk + (uart_id - 3));
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}
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#if !CONFIG_IS_ENABLED(OF_CONTROL) && !defined(CONFIG_SPL_BUILD)
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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static const struct ns16550_platdata lpc32xx_uart[] = {
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{ UART3_BASE, 2, CONFIG_SYS_NS16550_CLK },
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{ UART4_BASE, 2, CONFIG_SYS_NS16550_CLK },
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@ -18,33 +18,16 @@
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/* UART configuration */
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#if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
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(CONFIG_SYS_LPC32XX_UART == 7)
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#if defined(CONFIG_SPL_BUILD)
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/* SPL images do not support LPC32xx HSUART, UART5 is selected for SPL */
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#undef CONFIG_SYS_LPC32XX_UART
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#define CONFIG_SYS_LPC32XX_UART 5
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#endif
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#if !defined(CONFIG_LPC32XX_HSUART)
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#define CONFIG_LPC32XX_HSUART
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#endif
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#endif
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#if defined(CONFIG_SPL_BUILD)
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_CLK get_serial_clock()
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#define CONFIG_SYS_NS16550_COM1 UART3_BASE
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#define CONFIG_SYS_NS16550_COM2 UART4_BASE
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#define CONFIG_SYS_NS16550_COM3 UART5_BASE
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#define CONFIG_SYS_NS16550_COM4 UART6_BASE
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#endif
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#if !defined(CONFIG_SYS_NS16550_CLK)
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#define CONFIG_SYS_NS16550_CLK 13000000
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#endif
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#if !defined(CONFIG_LPC32XX_HSUART) || defined(CONFIG_SPL_BUILD)
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#if !defined(CONFIG_LPC32XX_HSUART)
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#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2)
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#else
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#define CONFIG_CONS_INDEX CONFIG_SYS_LPC32XX_UART
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@ -1,5 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_DEVKIT3250=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_DM=y
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CONFIG_DM_SERIAL=y
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CONFIG_DM_GPIO=y
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CONFIG_SPL=y
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@ -1,5 +1,7 @@
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CONFIG_ARM=y
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CONFIG_TARGET_WORK_92105=y
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_DM=y
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CONFIG_DM_SERIAL=y
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CONFIG_DM_GPIO=y
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CONFIG_SPL=y
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