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ARM: mach-omap2: Kconfig: Allow OMAP5 devices to set entry point

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Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to
have an non-standard boot address in memory. This may be due
to the device being a high security variant, which place the
Initial SoftWare (ISW) after certificates and secure software.

Allow these devices to set this from Kconfig.

Signed-off-by: Andrew F. Davis <afd@ti.com>
This commit is contained in:
Andrew F. Davis 2019-01-17 13:43:05 -06:00 committed by Tom Rini
parent 2dd468dbe1
commit 0fd1359c5a
3 changed files with 16 additions and 16 deletions
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15
arch/arm/mach-omap2/Kconfig
View File

@ -167,6 +167,21 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE
using hardware memory firewalls. This value must be smaller than the
TI_SECURE_EMIF_TOTAL_REGION_SIZE value.
if AM43XX || AM33XX || OMAP54XX
config ISW_ENTRY_ADDR
hex "Address in memory or XIP address of bootloader entry point"
default 0x402F4000 if AM43XX
default 0x402F0400 if AM33XX
default 0x40301350 if OMAP54XX
help
After any reset, the boot ROM searches the boot media for a valid
boot image. For non-XIP devices, the ROM then copies the image into
internal memory. For all boot modes, after the ROM processes the
boot image it eventually computes the entry point address depending
on the device type (secure/non-secure), boot media (xip/non-xip) and
image headers.
endif
source "arch/arm/mach-omap2/omap3/Kconfig"
source "arch/arm/mach-omap2/omap4/Kconfig"

15
arch/arm/mach-omap2/am33xx/Kconfig
View File

@ -275,21 +275,6 @@ config SPL_RTC_DDR_SUPPORT
endif
if AM43XX || AM33XX
config ISW_ENTRY_ADDR
hex "Address in memory or XIP flash of bootloader entry point"
default 0x402F4000 if AM43XX
default 0x402F0400 if AM33XX
help
After any reset, the boot ROM on the AM43XX SOC
searches the boot media for a valid boot image.
For non-XIP devices, the ROM then copies the
image into internal memory.
For all boot modes, after the ROM processes the
boot image it eventually computes the entry
point address depending on the device type
(secure/non-secure), boot media (xip/non-xip) and
image headers.
config PUB_ROM_DATA_SIZE
hex "Size in bytes of the L3 SRAM reserved by ROM to store data"
default 0x8400

2
include/configs/ti_omap5_common.h
View File

@ -81,7 +81,7 @@
* RAM from address 0x40301350 (0x40300000+0x1000(reserved)+0x350(cert)).
*/
#define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ 0x1000
#define CONFIG_SPL_TEXT_BASE 0x40301350
#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR
/* If no specific start address is specified then the secure EMIF
* region will be placed at the end of the DDR space. In order to prevent
* the main u-boot relocation from clobbering that memory and causing a