x86: qemu: Enable legacy IDE I/O ports decode
QEMU always decode legacy IDE I/O ports on PIIX chipset. However Linux ata_piix driver does sanity check to see whether legacy ports decode is turned on. To make Linux ata_piix driver happy, turn on the decode via IDE_TIMING register. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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@ -8,6 +8,7 @@
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#include <pci.h>
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#include <pci_rom.h>
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#include <asm/pci.h>
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#include <asm/arch/device.h>
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#include <asm/arch/qemu.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -87,5 +88,18 @@ int board_pci_post_scan(struct pci_controller *hose)
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for (i = 0; i < PAM_NUM; i++)
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x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW);
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if (device == PCI_DEVICE_ID_INTEL_82441) {
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/*
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* Enable legacy IDE I/O ports decode
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*
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* Note: QEMU always decode legacy IDE I/O port on PIIX chipset.
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* However Linux ata_piix driver does sanity check on these two
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* registers to see whether legacy ports decode is turned on.
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* This is to make Linux ata_piix driver happy.
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*/
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x86_pci_write_config16(PIIX_IDE, IDE0_TIM, IDE_DECODE_EN);
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x86_pci_write_config16(PIIX_IDE, IDE1_TIM, IDE_DECODE_EN);
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}
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return ret;
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}
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19
arch/x86/include/asm/arch-qemu/device.h
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19
arch/x86/include/asm/arch-qemu/device.h
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@ -0,0 +1,19 @@
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/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _QEMU_DEVICE_H_
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#define _QEMU_DEVICE_H_
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#include <pci.h>
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#define QEMU_I440FX PCI_BDF(0, 0, 0)
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#define PIIX_ISA PCI_BDF(0, 1, 0)
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#define PIIX_IDE PCI_BDF(0, 1, 1)
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#define PIIX_USB PCI_BDF(0, 1, 2)
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#define QEMU_Q35 PCI_BDF(0, 0, 0)
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#endif /* _QEMU_DEVICE_H_ */
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@ -13,6 +13,11 @@
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#define PAM_NUM 7
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#define PAM_RW 0x33
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/* IDE Timing Register */
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#define IDE0_TIM 0x40
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#define IDE1_TIM 0x42
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#define IDE_DECODE_EN 0x8000
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/* I/O Ports */
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#define CMOS_ADDR_PORT 0x70
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#define CMOS_DATA_PORT 0x71
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