imx: imx6ull: correct get_cpu_speed_grade_hz
i.MX6ULL has different speed grades than i.MX6UL. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
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@ -114,6 +114,12 @@ u32 get_cpu_rev(void)
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#define OCOTP_CFG3_SPEED_528MHZ 1
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#define OCOTP_CFG3_SPEED_528MHZ 1
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#define OCOTP_CFG3_SPEED_696MHZ 2
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#define OCOTP_CFG3_SPEED_696MHZ 2
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/*
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* For i.MX6ULL
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*/
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#define OCOTP_CFG3_SPEED_792MHZ 2
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#define OCOTP_CFG3_SPEED_900MHZ 3
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u32 get_cpu_speed_grade_hz(void)
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u32 get_cpu_speed_grade_hz(void)
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{
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{
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struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
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@ -126,7 +132,7 @@ u32 get_cpu_speed_grade_hz(void)
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val >>= OCOTP_CFG3_SPEED_SHIFT;
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val >>= OCOTP_CFG3_SPEED_SHIFT;
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val &= 0x3;
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val &= 0x3;
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if (is_mx6ul() || is_mx6ull()) {
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if (is_mx6ul()) {
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if (val == OCOTP_CFG3_SPEED_528MHZ)
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if (val == OCOTP_CFG3_SPEED_528MHZ)
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return 528000000;
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return 528000000;
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else if (val == OCOTP_CFG3_SPEED_696MHZ)
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else if (val == OCOTP_CFG3_SPEED_696MHZ)
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@ -135,6 +141,17 @@ u32 get_cpu_speed_grade_hz(void)
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return 0;
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return 0;
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}
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}
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if (is_mx6ull()) {
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if (val == OCOTP_CFG3_SPEED_528MHZ)
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return 528000000;
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else if (val == OCOTP_CFG3_SPEED_792MHZ)
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return 792000000;
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else if (val == OCOTP_CFG3_SPEED_900MHZ)
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return 900000000;
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else
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return 0;
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}
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switch (val) {
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switch (val) {
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/* Valid for IMX6DQ */
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/* Valid for IMX6DQ */
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case OCOTP_CFG3_SPEED_1P2GHZ:
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case OCOTP_CFG3_SPEED_1P2GHZ:
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