imx: imx6ull: correct get_cpu_speed_grade_hz

i.MX6ULL has different speed grades than i.MX6UL.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
This commit is contained in:
Sébastien Szymanski 2017-08-02 17:05:27 +02:00 committed by Stefano Babic
parent 44e670532d
commit 0c7c6fb764

View File

@ -114,6 +114,12 @@ u32 get_cpu_rev(void)
#define OCOTP_CFG3_SPEED_528MHZ 1
#define OCOTP_CFG3_SPEED_696MHZ 2
/*
* For i.MX6ULL
*/
#define OCOTP_CFG3_SPEED_792MHZ 2
#define OCOTP_CFG3_SPEED_900MHZ 3
u32 get_cpu_speed_grade_hz(void)
{
struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
@ -126,7 +132,7 @@ u32 get_cpu_speed_grade_hz(void)
val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
if (is_mx6ul() || is_mx6ull()) {
if (is_mx6ul()) {
if (val == OCOTP_CFG3_SPEED_528MHZ)
return 528000000;
else if (val == OCOTP_CFG3_SPEED_696MHZ)
@ -135,6 +141,17 @@ u32 get_cpu_speed_grade_hz(void)
return 0;
}
if (is_mx6ull()) {
if (val == OCOTP_CFG3_SPEED_528MHZ)
return 528000000;
else if (val == OCOTP_CFG3_SPEED_792MHZ)
return 792000000;
else if (val == OCOTP_CFG3_SPEED_900MHZ)
return 900000000;
else
return 0;
}
switch (val) {
/* Valid for IMX6DQ */
case OCOTP_CFG3_SPEED_1P2GHZ: