Blackfin: bfin_mac: convert from old style MMR macros
The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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0c7148170b
@ -131,12 +131,12 @@ static int bfin_EMAC_send(struct eth_device *dev, volatile void *packet,
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goto out;
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goto out;
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}
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}
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if ((*pDMA2_IRQ_STATUS & DMA_ERR) != 0) {
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if (bfin_read_DMA2_IRQ_STATUS() & DMA_ERR) {
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printf("Ethernet: tx DMA error\n");
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printf("Ethernet: tx DMA error\n");
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goto out;
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goto out;
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}
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}
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for (i = 0; (*pDMA2_IRQ_STATUS & DMA_RUN) != 0; i++) {
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for (i = 0; (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN); ++i) {
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if (i > TOUT_LOOP) {
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if (i > TOUT_LOOP) {
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puts("Ethernet: tx time out\n");
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puts("Ethernet: tx time out\n");
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goto out;
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goto out;
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@ -145,9 +145,9 @@ static int bfin_EMAC_send(struct eth_device *dev, volatile void *packet,
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txbuf[txIdx]->FrmData->NoBytes = length;
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txbuf[txIdx]->FrmData->NoBytes = length;
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memcpy(txbuf[txIdx]->FrmData->Dest, (void *)packet, length);
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memcpy(txbuf[txIdx]->FrmData->Dest, (void *)packet, length);
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txbuf[txIdx]->Dma[0].START_ADDR = (u32) txbuf[txIdx]->FrmData;
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txbuf[txIdx]->Dma[0].START_ADDR = (u32) txbuf[txIdx]->FrmData;
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*pDMA2_NEXT_DESC_PTR = txbuf[txIdx]->Dma;
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bfin_write_DMA2_NEXT_DESC_PTR(txbuf[txIdx]->Dma);
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*pDMA2_CONFIG = txdmacfg.data;
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bfin_write_DMA2_CONFIG(txdmacfg.data);
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*pEMAC_OPMODE |= TE;
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bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
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for (i = 0; (txbuf[txIdx]->StatusWord & TX_COMP) == 0; i++) {
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for (i = 0; (txbuf[txIdx]->StatusWord & TX_COMP) == 0; i++) {
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if (i > TOUT_LOOP) {
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if (i > TOUT_LOOP) {
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@ -194,7 +194,7 @@ static int bfin_EMAC_recv(struct eth_device *dev)
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NetRxPackets[rxIdx] =
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NetRxPackets[rxIdx] =
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(volatile uchar *)(rxbuf[rxIdx]->FrmData->Dest);
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(volatile uchar *)(rxbuf[rxIdx]->FrmData->Dest);
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NetReceive(NetRxPackets[rxIdx], length - 4);
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NetReceive(NetRxPackets[rxIdx], length - 4);
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*pDMA1_IRQ_STATUS |= DMA_DONE | DMA_ERR;
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bfin_write_DMA1_IRQ_STATUS(DMA_DONE | DMA_ERR);
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rxbuf[rxIdx]->StatusWord = 0x00000000;
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rxbuf[rxIdx]->StatusWord = 0x00000000;
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if ((rxIdx + 1) >= PKTBUFSRX)
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if ((rxIdx + 1) >= PKTBUFSRX)
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rxIdx = 0;
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rxIdx = 0;
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@ -229,7 +229,7 @@ static int bfin_miiphy_init(struct eth_device *dev, int *opmode)
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size_t count;
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size_t count;
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/* Enable PHY output */
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/* Enable PHY output */
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*pVR_CTL |= CLKBUFOE;
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bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
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/* Set all the pins to peripheral mode */
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/* Set all the pins to peripheral mode */
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peripheral_request_list(pins, "bfin_mac");
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peripheral_request_list(pins, "bfin_mac");
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@ -265,30 +265,32 @@ static int bfin_miiphy_init(struct eth_device *dev, int *opmode)
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bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
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bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
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/* Initialize the TX DMA channel registers */
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/* Initialize the TX DMA channel registers */
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*pDMA2_X_COUNT = 0;
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bfin_write_DMA2_X_COUNT(0);
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*pDMA2_X_MODIFY = 4;
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bfin_write_DMA2_X_MODIFY(4);
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*pDMA2_Y_COUNT = 0;
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bfin_write_DMA2_Y_COUNT(0);
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*pDMA2_Y_MODIFY = 0;
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bfin_write_DMA2_Y_MODIFY(0);
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/* Initialize the RX DMA channel registers */
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/* Initialize the RX DMA channel registers */
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*pDMA1_X_COUNT = 0;
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bfin_write_DMA1_X_COUNT(0);
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*pDMA1_X_MODIFY = 4;
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bfin_write_DMA1_X_MODIFY(4);
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*pDMA1_Y_COUNT = 0;
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bfin_write_DMA1_Y_COUNT(0);
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*pDMA1_Y_MODIFY = 0;
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bfin_write_DMA1_Y_MODIFY(0);
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return 0;
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return 0;
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}
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}
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static int bfin_EMAC_setup_addr(struct eth_device *dev)
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static int bfin_EMAC_setup_addr(struct eth_device *dev)
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{
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{
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*pEMAC_ADDRLO =
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bfin_write_EMAC_ADDRLO(
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dev->enetaddr[0] |
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dev->enetaddr[0] |
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dev->enetaddr[1] << 8 |
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dev->enetaddr[1] << 8 |
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dev->enetaddr[2] << 16 |
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dev->enetaddr[2] << 16 |
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dev->enetaddr[3] << 24;
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dev->enetaddr[3] << 24
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*pEMAC_ADDRHI =
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);
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bfin_write_EMAC_ADDRHI(
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dev->enetaddr[4] |
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dev->enetaddr[4] |
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dev->enetaddr[5] << 8;
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dev->enetaddr[5] << 8
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);
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return 0;
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return 0;
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}
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}
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@ -328,8 +330,8 @@ static int bfin_EMAC_init(struct eth_device *dev, bd_t *bd)
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}
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}
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/* Set RX DMA */
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/* Set RX DMA */
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*pDMA1_NEXT_DESC_PTR = rxbuf[0]->Dma;
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bfin_write_DMA1_NEXT_DESC_PTR(rxbuf[0]->Dma);
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*pDMA1_CONFIG = rxbuf[0]->Dma[0].CONFIG_DATA;
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bfin_write_DMA1_CONFIG(rxbuf[0]->Dma[0].CONFIG_DATA);
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/* Wait MII done */
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/* Wait MII done */
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bfin_miiphy_wait();
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bfin_miiphy_wait();
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@ -350,7 +352,7 @@ static int bfin_EMAC_init(struct eth_device *dev, bd_t *bd)
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opmode |= TE | RMII;
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opmode |= TE | RMII;
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#endif
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#endif
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/* Turn on the EMAC */
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/* Turn on the EMAC */
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*pEMAC_OPMODE = opmode;
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bfin_write_EMAC_OPMODE(opmode);
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return 0;
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return 0;
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}
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}
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@ -358,11 +360,10 @@ static void bfin_EMAC_halt(struct eth_device *dev)
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{
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{
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debug("Eth_halt: ......\n");
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debug("Eth_halt: ......\n");
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/* Turn off the EMAC */
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/* Turn off the EMAC */
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*pEMAC_OPMODE = 0x00000000;
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bfin_write_EMAC_OPMODE(0);
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/* Turn off the EMAC RX DMA */
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/* Turn off the EMAC RX DMA */
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*pDMA1_CONFIG = 0x0000;
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bfin_write_DMA1_CONFIG(0);
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*pDMA2_CONFIG = 0x0000;
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bfin_write_DMA2_CONFIG(0);
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}
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}
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ADI_ETHER_BUFFER *SetupRxBuffer(int no)
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ADI_ETHER_BUFFER *SetupRxBuffer(int no)
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@ -443,16 +444,19 @@ int ether_post_test(int flags)
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uchar buf[64];
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uchar buf[64];
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int i, value = 0;
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int i, value = 0;
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int length;
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int length;
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uint addr;
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printf("\n--------");
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printf("\n--------");
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bfin_EMAC_init(NULL, NULL);
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bfin_EMAC_init(NULL, NULL);
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/* construct the package */
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/* construct the package */
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buf[0] = buf[6] = (unsigned char)(*pEMAC_ADDRLO & 0xFF);
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addr = bfin_read_EMAC_ADDRLO();
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buf[1] = buf[7] = (unsigned char)((*pEMAC_ADDRLO & 0xFF00) >> 8);
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buf[0] = buf[6] = addr;
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buf[2] = buf[8] = (unsigned char)((*pEMAC_ADDRLO & 0xFF0000) >> 16);
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buf[1] = buf[7] = addr >> 8;
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buf[3] = buf[9] = (unsigned char)((*pEMAC_ADDRLO & 0xFF000000) >> 24);
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buf[2] = buf[8] = addr >> 16;
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buf[4] = buf[10] = (unsigned char)(*pEMAC_ADDRHI & 0xFF);
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buf[3] = buf[9] = addr >> 24;
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buf[5] = buf[11] = (unsigned char)((*pEMAC_ADDRHI & 0xFF00) >> 8);
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addr = bfin_read_EMAC_ADDRHI();
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buf[4] = buf[10] = addr;
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buf[5] = buf[11] = addr >> 8;
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buf[12] = 0x08; /* Type: ARP */
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buf[12] = 0x08; /* Type: ARP */
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buf[13] = 0x06;
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buf[13] = 0x06;
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buf[14] = 0x00; /* Hardware type: Ethernet */
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buf[14] = 0x00; /* Hardware type: Ethernet */
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