imx: mx6: implement functions to boot auxiliary core
Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up. arch_auxiliary_core_check_up is used to check whether M4 is running or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will use the pc and stack which is set in arch_auxiliary_core_up to set R15 and R13 register and boot. Signed-off-by: Ye.Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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@ -567,3 +567,41 @@ void imx_setup_hdmi(void)
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writel(reg, &mxc_ccm->chsccdr);
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}
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#endif
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#ifdef CONFIG_IMX_BOOTAUX
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int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
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{
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struct src *src_reg;
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u32 stack, pc;
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if (!boot_private_data)
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return -EINVAL;
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stack = *(u32 *)boot_private_data;
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pc = *(u32 *)(boot_private_data + 4);
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/* Set the stack and pc to M4 bootROM */
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writel(stack, M4_BOOTROM_BASE_ADDR);
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writel(pc, M4_BOOTROM_BASE_ADDR + 4);
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/* Enable M4 */
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src_reg = (struct src *)SRC_BASE_ADDR;
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clrsetbits_le32(&src_reg->scr, SRC_SCR_M4C_NON_SCLR_RST_MASK,
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SRC_SCR_M4_ENABLE_MASK);
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return 0;
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}
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int arch_auxiliary_core_check_up(u32 core_id)
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{
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struct src *src_reg = (struct src *)SRC_BASE_ADDR;
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unsigned val;
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val = readl(&src_reg->scr);
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if (val & SRC_SCR_M4C_NON_SCLR_RST_MASK)
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return 0; /* assert in reset */
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return 1;
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}
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#endif
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@ -438,6 +438,11 @@ struct src {
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u32 gpr10;
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};
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#define SRC_SCR_M4_ENABLE_OFFSET 22
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#define SRC_SCR_M4_ENABLE_MASK (1 << 22)
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#define SRC_SCR_M4C_NON_SCLR_RST_OFFSET 4
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#define SRC_SCR_M4C_NON_SCLR_RST_MASK (1 << 4)
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/* GPR1 bitfields */
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#define IOMUXC_GPR1_APP_CLK_REQ_N BIT(30)
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#define IOMUXC_GPR1_PCIE_EXIT_L1 BIT(28)
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