85xx: Improve MPIC initialization
The MPIC initialization code for Freescale e500 CPUs was not using I/O accessors, and it was not issuing a read-back to the MPIC after setting mixed mode. This may be the cause of a spurious interrupt on some systems. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -31,15 +31,17 @@
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#include <watchdog.h>
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#include <watchdog.h>
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#include <command.h>
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#include <command.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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int interrupt_init_cpu(unsigned long *decrementer_count)
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int interrupt_init_cpu(unsigned int *decrementer_count)
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{
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{
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volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
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ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC85xx_PIC_ADDR;
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pic->gcr = MPC85xx_PICGCR_RST;
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out_be32(&pic->gcr, MPC85xx_PICGCR_RST);
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while (pic->gcr & MPC85xx_PICGCR_RST)
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while (in_be32(&pic->gcr) & MPC85xx_PICGCR_RST)
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;
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;
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pic->gcr = MPC85xx_PICGCR_M;
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out_be32(&pic->gcr, MPC85xx_PICGCR_M);
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in_be32(&pic->gcr);
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*decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
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*decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
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