Add PCI support to TQM8540 and TQM8560 boards
Patch by Stefan Roese, 15 Sep 2005
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@ -2,6 +2,9 @@
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Changes for U-Boot 1.1.4:
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======================================================================
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* Add PCI support to TQM8540 and TQM8560 boards
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Patch by Stefan Roese, 15 Sep 2005
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* Update AMCC Yosemite to get a consistent setup for all AMCC eval
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boards (baudrate, environment...). Flash driver fixed.
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Patch by Stefan Roese, 15 Sep 2005
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@ -41,7 +41,7 @@
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#define CONFIG_MPC8540 1 /* MPC8540 specific */
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#define CONFIG_TQM8540 1 /* TQM8540 board specific */
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#undef CONFIG_PCI
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#define CONFIG_PCI
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#define CONFIG_TSEC_ENET /* tsec ethernet support */
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#undef CONFIG_DDR_ECC /* only for ECC DDR module */
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#define CONFIG_DDR_DLL /* possible DLL fix needed */
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@ -74,6 +74,8 @@
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
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#define CFG_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */
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#undef CFG_DRAM_TEST /* memory test, takes time */
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#define CFG_MEMTEST_START 0x00000000 /* memtest region */
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#define CFG_MEMTEST_END 0x10000000
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@ -42,7 +42,12 @@
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#define CONFIG_MPC8560 1 /* MPC8560 specific */
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#define CONFIG_TQM8560 1 /* TQM8560 board specific */
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#undef CONFIG_PCI
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/*
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* BIG FAT WARNING: Right now PCI seems to have a problem on the
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* TQM8560 on the Starter Kit. So, if the board doen't come up
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* please disable the PCI support for now. sr@denx.de, 15-09-2005
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*/
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#define CONFIG_PCI
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#define CONFIG_TSEC_ENET /* tsec ethernet support */
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#undef CONFIG_DDR_ECC /* only for ECC DDR module */
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#define CONFIG_DDR_DLL /* possible DLL fix needed */
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@ -75,6 +80,8 @@
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
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#define CFG_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */
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#undef CFG_DRAM_TEST /* memory test, takes time */
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#define CFG_MEMTEST_START 0x00000000 /* memtest region */
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#define CFG_MEMTEST_END 0x10000000
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@ -276,7 +283,7 @@
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#define CONFIG_NET_MULTI
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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#undef CONFIG_EEPRO100
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#define CONFIG_EEPRO100
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#undef CONFIG_TULIP
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#if !defined(CONFIG_PCI_PNP)
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@ -298,12 +305,27 @@
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#endif
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_MPC85XX_TSEC1 1
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#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
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#define CONFIG_MPC85XX_TSEC2 1
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#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
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#define TSEC1_PHY_ADDR 0
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#define TSEC2_PHY_ADDR 1
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#define TSEC1_PHYIDX 0
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#define TSEC2_PHYIDX 0
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#endif /* CONFIG_TSEC_ENET */
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#define CONFIG_MPC85XX_FEC 1
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#define CONFIG_MPC85XX_FEC_NAME "FEC"
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#define FEC_PHY_ADDR 2
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#define FEC_PHYIDX 0
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#define CONFIG_HAS_ETH1
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#define CONFIG_HAS_ETH2
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/* Options are TSEC[0-1], FEC */
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#define CONFIG_ETHPRIME "TSEC0"
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#endif /* CONFIG_TSEC_ENET */
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#define CONFIG_ETHER_ON_FCC
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#define CONFIG_ETHER_ON_FCC3
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@ -312,8 +334,6 @@
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#define CFG_CPMFCR_RAMTYPE 0
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#define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
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#define CONFIG_ETHPRIME "TSEC1"
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/*
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* Environment
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*/
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