MX31: Added support for the Casio COM57H5M10XRC to QONG
The patch adds setup to connect a CASIO COM57H5M10XRC (640x480 TFT display) to the QONG module. Signed-off-by: Stefano Babic <sbabic@denx.de>
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@ -56,22 +56,7 @@ void lcd_panel_disable(void)
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#define msleep(a) udelay(a * 1000)
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#ifndef CONFIG_DISPLAY_VBEST_VGG322403
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#define XRES 240
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#define YRES 320
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#define PANEL_TYPE IPU_PANEL_TFT
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#define PIXEL_CLK 185925
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#define PIXEL_FMT IPU_PIX_FMT_RGB666
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#define H_START_WIDTH 9 /* left_margin */
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#define H_SYNC_WIDTH 1 /* hsync_len */
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#define H_END_WIDTH (16 + 1) /* right_margin + hsync_len */
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#define V_START_WIDTH 7 /* upper_margin */
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#define V_SYNC_WIDTH 1 /* vsync_len */
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#define V_END_WIDTH (9 + 1) /* lower_margin + vsync_len */
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#define SIG_POL (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL)
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#define IF_CONF 0
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#define IF_CLK_DIV 0x175
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#else /* Display Vbest VGG322403 */
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#if defined(CONFIG_DISPLAY_VBEST_VGG322403)
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#define XRES 320
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#define YRES 240
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#define PANEL_TYPE IPU_PANEL_TFT
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@ -86,6 +71,36 @@ void lcd_panel_disable(void)
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#define SIG_POL (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL)
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#define IF_CONF 0
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#define IF_CLK_DIV 0x175
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#elif defined(CONFIG_DISPLAY_COM57H5M10XRC)
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#define XRES 640
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#define YRES 480
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#define PANEL_TYPE IPU_PANEL_TFT
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#define PIXEL_CLK 40000
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#define PIXEL_FMT IPU_PIX_FMT_RGB666
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#define H_START_WIDTH 120 /* left_margin */
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#define H_SYNC_WIDTH 30 /* hsync_len */
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#define H_END_WIDTH (10 + 30) /* right_margin + hsync_len */
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#define V_START_WIDTH 35 /* upper_margin */
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#define V_SYNC_WIDTH 3 /* vsync_len */
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#define V_END_WIDTH (7 + 3) /* lower_margin + vsync_len */
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#define SIG_POL (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL)
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#define IF_CONF 0
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#define IF_CLK_DIV 0x175
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#else
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#define XRES 240
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#define YRES 320
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#define PANEL_TYPE IPU_PANEL_TFT
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#define PIXEL_CLK 185925
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#define PIXEL_FMT IPU_PIX_FMT_RGB666
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#define H_START_WIDTH 9 /* left_margin */
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#define H_SYNC_WIDTH 1 /* hsync_len */
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#define H_END_WIDTH (16 + 1) /* right_margin + hsync_len */
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#define V_START_WIDTH 7 /* upper_margin */
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#define V_SYNC_WIDTH 1 /* vsync_len */
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#define V_END_WIDTH (9 + 1) /* lower_margin + vsync_len */
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#define SIG_POL (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL)
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#define IF_CONF 0
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#define IF_CLK_DIV 0x175
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#endif
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#define LCD_COLOR_IPU LCD_COLOR16
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@ -84,7 +84,7 @@
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_16BPP
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#define CONFIG_DISPLAY_VBEST_VGG322403
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#define CONFIG_DISPLAY_COM57H5M10XRC
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/*
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* Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
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