ARM: tegra: reduce CSITE clock from 204M to 136M
The L4T kernel complains about a CSITE clock rate above 144MHz, presumably because the HW is only characterized for a clock less than that. Adjust the rate to 136MHz to avoid the warning and stay in spec. Signed-off-by: Bryan Wu <pengw@nvidia.com> (swarren, re-wrote commit description) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -16,7 +16,7 @@
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#elif defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA114) || \
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defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA210)
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#define NVBL_PLLP_KHZ 408000
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#define CSITE_KHZ 204000
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#define CSITE_KHZ 136000
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#else
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#error "Unknown Tegra chip!"
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#endif
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