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Merge with /home/m8/git/u-boot

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This commit is contained in:
Wolfgang Denk 2006-07-05 10:03:52 +02:00
commit 0095b787fe
9 changed files with 45 additions and 33 deletions
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9
CHANGELOG
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@ -2,6 +2,15 @@
Changes since U-Boot 1.1.4:
======================================================================
* Add AMCC bamboo board to MAKEALL build script.
* Fix AMCC bamboo eval board compilation errors.
* Add system memory to the PCI region list for AMCC PPC44x CPUs.
Enabled it for Yucca board.
* Cleanup config file and bootup output for Yucca board.
* Fix CONFIG_440_GX define usage.
* Remove autogenerated bmp_logo.h file.

2
MAKEALL
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@ -75,7 +75,7 @@ LIST_4xx=" \
PIP405 PLU405 PMC405 PPChameleonEVB \
sbc405 VOH405 VOM405 W7OLMC \
W7OLMG walnut WUH405 XPEDITE1K \
yellowstone yosemite yucca \
yellowstone yosemite yucca bamboo \
"
#########################################################################

2
board/amcc/bamboo/bamboo.c
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@ -435,7 +435,7 @@ long int initdram (int board_type)
*/
init_spd_array();
dram_size = spd_sdram (0);
dram_size = spd_sdram();
return dram_size;
}

13
board/amcc/bamboo/bamboo.h
View File

@ -283,10 +283,8 @@
/*----------------------------------------------------------------------------+
| PPC440EP GPIOs addresses.
+----------------------------------------------------------------------------*/
#define GPIO0_BASE 0xEF600B00
#define GPIO0_REAL 0xEF600B00
#define GPIO1_BASE 0xEF600C00
#define GPIO1_REAL 0xEF600C00
/* Offsets */
@ -331,17 +329,6 @@
#define GPIO_IS3(x) (x+GPIOx_IS3L) /* GPIO Input register3 High or Low */
/*----------------------------------------------------------------------------+
| Declare Configuration values
+----------------------------------------------------------------------------*/
typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;
typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;
typedef struct { unsigned long add; /* gpio core base address */
gpio_driver_t in_out; /* Driver Setting */
gpio_select_t alt_nb; /* Selected Alternate */
} gpio_param_s;
/*----------------------------------------------------------------------------+
| XX XX
|

17
board/amcc/yucca/yucca.c
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@ -541,18 +541,15 @@ int board_early_init_f (void)
int checkboard (void)
{
sys_info_t sysinfo;
char *s = getenv("serial#");
get_sys_info (&sysinfo);
printf("Board: Yucca - AMCC 440SPe Evaluation Board");
if (s != NULL) {
puts(", serial# ");
puts(s);
}
putc('\n');
printf ("Board: AMCC 440SPe Evaluation Board\n");
printf ("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz / 1000000);
printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000);
printf ("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000);
printf ("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000);
printf ("\tEPB: %lu MHz\n", sysinfo.freqEPB / 1000000);
printf ("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000);
printf ("\tDDR: %lu MHz\n", sysinfo.freqDDR / 1000000);
return 0;
}

13
cpu/ppc4xx/405gp_pci.c
View File

@ -465,17 +465,30 @@ void pci_440_init (struct pci_controller *hose)
hose->first_busno = 0;
hose->last_busno = 0xff;
/* PCI I/O space */
pci_set_region(hose->regions + reg_num++,
0x00000000,
PCIX0_IOBASE,
0x10000,
PCI_REGION_IO);
/* PCI memory space */
pci_set_region(hose->regions + reg_num++,
CFG_PCI_TARGBASE,
CFG_PCI_MEMBASE,
0x10000000,
PCI_REGION_MEM );
#if defined(CONFIG_PCI_SYS_MEM_BUS) && defined(CONFIG_PCI_SYS_MEM_PHYS) && \
defined(CONFIG_PCI_SYS_MEM_SIZE)
/* System memory space */
pci_set_region(hose->regions + reg_num++,
CONFIG_PCI_SYS_MEM_BUS,
CONFIG_PCI_SYS_MEM_PHYS,
CONFIG_PCI_SYS_MEM_SIZE,
PCI_REGION_MEM | PCI_REGION_MEMORY );
#endif
hose->region_count = reg_num;
pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA);

6
cpu/ppc4xx/cpu.c
View File

@ -253,11 +253,13 @@ int checkcpu (void)
break;
case PVR_440SPe_RA:
puts("SPe 3GA533C");
puts("SPe Rev. A");
break;
case PVR_440SPe_RB:
puts("SPe 3GB533C");
puts("SPe Rev. B");
break;
default:
printf (" UNKNOWN (PVR=%08x)", pvr);
break;

2
include/asm-ppc/processor.h
View File

@ -736,7 +736,7 @@
#define PVR_440SP_RA 0x53221850
#define PVR_440SP_RB 0x53221891
#define PVR_440SPe_RA 0x53421890
#define PVR_440SPe_RB 0x53521891
#define PVR_440SPe_RB 0x53421891
#define PVR_601 0x00010000
#define PVR_602 0x00050000
#define PVR_603 0x00030000

14
include/configs/yucca.h
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@ -34,7 +34,6 @@
#define DEBUG
#undef DEBUG
#define CONFIG_IDENT_STRING "\nU_440SPe_V1R01 level06"
/*-----------------------------------------------------------------------
* High Level Configuration Options
*----------------------------------------------------------------------*/
@ -76,6 +75,11 @@
/* #define CFG_PCI_BASE_REGS 0xBEC00000 */ /* internal PCI regs */
/* #define CFG_PCI_BASE_CYCLE 0xBED00000 */ /* internal PCI regs */
/* System RAM mapped to PCI space */
#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
#define CFG_FPGA_BASE 0xe2000000 /* epld */
#define CFG_OPER_FLASH 0xe7000000 /* SRAM - OPER Flash */
@ -149,8 +153,8 @@
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_BOOTARGS "console=ttyS0,115200n8 root=/dev/nfs rw"
#define CONFIG_BOOTCOMMAND "bootm E7C00000" /* autoboot command */
#define CONFIG_BOOTDELAY -1 /* -1 to disable autoboot */
#define CONFIG_BOOTCOMMAND "bootm E7C00000" /* autoboot command */
#define CONFIG_BOOTDELAY -1 /* -1 to disable autoboot */
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
@ -192,7 +196,7 @@
"ramdisk_addr=E7F20000\0" \
"load=tftp 100000 yuca/u-boot.bin\0" \
"update=protect off 2:4-7;era 2:4-7;" \
"cp.b ${fileaddr} fffc0000 ${filesize};" \
"cp.b ${fileaddr} FFFB0000 ${filesize};" \
"setenv filesize;saveenv\0" \
"upd=run load;run update\0" \
""
@ -267,7 +271,7 @@
/* General PCI */
#define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW i /* show pci devices on startup */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
#undef CONFIG_PCI_CONFIG_HOST_BRIDGE
/* Board-specific PCI */