2018-05-06 18:27:01 -04:00
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/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
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2018-03-12 10:46:11 +01:00
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/*
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* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
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*/
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#ifndef __MACH_STM32MP_DDR_H_
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#define __MACH_STM32MP_DDR_H_
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2019-04-10 14:09:26 +02:00
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/* DDR power initializations */
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enum ddr_type {
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STM32MP_DDR3,
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2020-03-06 11:14:03 +01:00
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STM32MP_LPDDR2_16,
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STM32MP_LPDDR2_32,
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STM32MP_LPDDR3_16,
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STM32MP_LPDDR3_32,
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2019-04-10 14:09:26 +02:00
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};
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int board_ddr_power_init(enum ddr_type ddr_type);
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2018-03-12 10:46:11 +01:00
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#endif
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