2017-11-15 12:14:51 +00:00
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/*
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* Copyright (C) STMicroelectronics SA 2017
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* Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __STM32_RCC_H_
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#define __STM32_RCC_H_
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#define AHB_PSC_1 0
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#define AHB_PSC_2 0x8
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#define AHB_PSC_4 0x9
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#define AHB_PSC_8 0xA
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#define AHB_PSC_16 0xB
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#define AHB_PSC_64 0xC
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#define AHB_PSC_128 0xD
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#define AHB_PSC_256 0xE
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#define AHB_PSC_512 0xF
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#define APB_PSC_1 0
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#define APB_PSC_2 0x4
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#define APB_PSC_4 0x5
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#define APB_PSC_8 0x6
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#define APB_PSC_16 0x7
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struct pll_psc {
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u8 pll_m;
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u16 pll_n;
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u8 pll_p;
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u8 pll_q;
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u8 ahb_psc;
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u8 apb1_psc;
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u8 apb2_psc;
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};
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struct stm32_clk_info {
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struct pll_psc sys_pll_psc;
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bool has_overdrive;
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2017-11-15 12:14:52 +00:00
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bool v2;
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2017-11-15 12:14:51 +00:00
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};
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enum soc_family {
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STM32F4,
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STM32F7,
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};
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struct stm32_rcc_clk {
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char *drv_name;
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enum soc_family soc;
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};
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#endif /* __STM32_RCC_H_ */
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