arch/x86/dts/serial.dtsi

/ {
	serial {
		compatible = "x86-uart";
		reg = <0x3f8 8>;
		reg-shift = <0>;
		io-mapped = <1>;
		multiplier = <1>;
		baudrate = <115200>;
	};
};
x86: fdt: Create basic .dtsi file for coreboot This contains just the minimum information for a coreboot-based board. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> 2012-12-03 13:56:51 +00:00			`/ {`
			`serial {`
x86: Rename coreboot-serial to x86-serial Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 2014-12-17 15:50:47 +08:00			`compatible = "x86-uart";`
x86: Clean up the board dts files This commits cleans up the board dts files. - Correct the serial port register size to 8 - Remove the misleading status = "disabled" statement in the serial.dtsi - Move the inclusion of skeleton.dtsi from serial.dtsi to board dts files - Let the board dts file define stdout-path in the chosen node - Remove device nodes in board dts files thar are duplicated to skeleton.dtsi Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 2014-12-24 13:06:39 +08:00			`reg = <0x3f8 8>;`
dm: x86: dts: Add additional info to the serial port node Add more information so that U-Boot can find the address of the serial port. Also fix the reg-shift value. Signed-off-by: Simon Glass <sjg@chromium.org> 2014-10-10 07:49:19 -06:00			`reg-shift = <0>;`
x86: fdt: Create basic .dtsi file for coreboot This contains just the minimum information for a coreboot-based board. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> 2012-12-03 13:56:51 +00:00			`io-mapped = <1>;`
			`multiplier = <1>;`
			`baudrate = <115200>;`
			`};`
			`};`