Wayne Lin 320eca62fe drm/amd/display: Add otg vertical interrupt0 support in DCN1.0 ... [Why & How] On DCN1.0, need otg vertical line interrupt to get appropriate timing to achieve specific feature request. Add otg vertical interrupt0 support for registers which operation is vertical sensitive. Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-02-09 15:29:02 -05:00
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amdgpu_dm	drm/amd/display: Add otg vertical interrupt0 support in DCN1.0	2021-02-09 15:29:02 -05:00
dc	drm/amd/display: Add otg vertical interrupt0 support in DCN1.0	2021-02-09 15:29:02 -05:00
dmub	drm/amd/display: [FW Promotion] Release 0.0.50	2021-02-02 12:12:28 -05:00
include	drm/amd/display: Add internal display info	2020-11-24 12:08:15 -05:00
modules	drm/amd/display: fix calculation for the pwl backlight curve	2021-02-02 12:09:46 -05:00
Kconfig	drm/amdgpu/display: drop DCN support for aarch64	2021-01-05 11:35:53 -05:00
Makefile	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guards	2019-11-13 15:29:42 -05:00
TODO