Evan Quan fefdc6cc0a drm/amdgpu: use different irq ring ID for Vega20 page queues ... Vega20 uses ring id 1 for page queues EOP irq while previous ASICs take ring id 3. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-12-14 15:55:01 -05:00
..
drm	drm/amdgpu: use different irq ring ID for Vega20 page queues	2018-12-14 15:55:01 -05:00
host1x	gpu: host1x: Add Tegra194 support	2018-11-29 17:11:49 +01:00
ipu-v3	gpu: ipu-v3: image-convert: allow three rows or columns	2018-11-05 14:40:08 +01:00
vga	drm-misc-next for v4.21, part 1:	2018-11-19 10:40:33 +10:00
Makefile