QMP PHY for USB/PCIE requires pipe_clk for locking of retime buffers at the pipe interface. Driver checks for PHY_STATUS without enabling pipe_clk due to which phy_init() fails with initialization timeout. Though pipe_clk is output from PHY (after PLL is programmed during initialization sequence) to GCC clock_ctl and then fed back to PHY but for PHY_STATUS register to reflect successful initialization pipe_clk from GCC must be present. Since, clock driver now ignores status_check for pipe_clk on clk_enable/disable, driver can safely enable/disable pipe_clk from phy_init/exit. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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allwinner | ||
amlogic | ||
broadcom | ||
hisilicon | ||
lantiq | ||
marvell | ||
mediatek | ||
motorola | ||
qualcomm | ||
ralink | ||
renesas | ||
rockchip | ||
samsung | ||
st | ||
tegra | ||
ti | ||
Kconfig | ||
Makefile | ||
phy-core.c | ||
phy-lpc18xx-usb-otg.c | ||
phy-pistachio-usb.c | ||
phy-xgene.c |