forked from Minki/linux
fc18d6c047
The W83627EHF and similar chips have 6 VID input pins, add support for them. The driver changes the input voltage level automatically if the current setting is not correct for the detected CPU model. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com>
1540 lines
48 KiB
C
1540 lines
48 KiB
C
/*
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w83627ehf - Driver for the hardware monitoring functionality of
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the Winbond W83627EHF Super-I/O chip
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Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
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Copyright (C) 2006 Yuan Mu (Winbond),
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Rudolf Marek <r.marek@assembler.cz>
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David Hubbard <david.c.hubbard@gmail.com>
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Shamelessly ripped from the w83627hf driver
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Copyright (C) 2003 Mark Studebaker
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Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
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in testing and debugging this driver.
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This driver also supports the W83627EHG, which is the lead-free
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version of the W83627EHF.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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Supports the following chips:
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Chip #vin #fan #pwm #temp chip IDs man ID
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w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
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0x8860 0xa1
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w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/jiffies.h>
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#include <linux/platform_device.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/hwmon-vid.h>
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#include <linux/err.h>
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#include <linux/mutex.h>
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#include <asm/io.h>
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#include "lm75.h"
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enum kinds { w83627ehf, w83627dhg };
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/* used to set data->name = w83627ehf_device_names[data->sio_kind] */
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static const char * w83627ehf_device_names[] = {
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"w83627ehf",
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"w83627dhg",
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};
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#define DRVNAME "w83627ehf"
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/*
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* Super-I/O constants and functions
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*/
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#define W83627EHF_LD_HWM 0x0b
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#define SIO_REG_LDSEL 0x07 /* Logical device select */
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#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
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#define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
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#define SIO_REG_ENABLE 0x30 /* Logical device enable */
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#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
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#define SIO_REG_VID_CTRL 0xF0 /* VID control */
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#define SIO_REG_VID_DATA 0xF1 /* VID data */
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#define SIO_W83627EHF_ID 0x8850
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#define SIO_W83627EHG_ID 0x8860
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#define SIO_W83627DHG_ID 0xa020
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#define SIO_ID_MASK 0xFFF0
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static inline void
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superio_outb(int ioreg, int reg, int val)
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{
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outb(reg, ioreg);
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outb(val, ioreg + 1);
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}
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static inline int
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superio_inb(int ioreg, int reg)
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{
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outb(reg, ioreg);
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return inb(ioreg + 1);
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}
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static inline void
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superio_select(int ioreg, int ld)
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{
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outb(SIO_REG_LDSEL, ioreg);
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outb(ld, ioreg + 1);
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}
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static inline void
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superio_enter(int ioreg)
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{
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outb(0x87, ioreg);
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outb(0x87, ioreg);
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}
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static inline void
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superio_exit(int ioreg)
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{
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outb(0x02, ioreg);
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outb(0x02, ioreg + 1);
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}
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/*
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* ISA constants
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*/
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#define IOREGION_ALIGNMENT ~7
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#define IOREGION_OFFSET 5
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#define IOREGION_LENGTH 2
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#define ADDR_REG_OFFSET 0
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#define DATA_REG_OFFSET 1
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#define W83627EHF_REG_BANK 0x4E
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#define W83627EHF_REG_CONFIG 0x40
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/* Not currently used:
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* REG_MAN_ID has the value 0x5ca3 for all supported chips.
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* REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
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* REG_MAN_ID is at port 0x4f
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* REG_CHIP_ID is at port 0x58 */
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static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
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static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
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/* The W83627EHF registers for nr=7,8,9 are in bank 5 */
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#define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
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(0x554 + (((nr) - 7) * 2)))
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#define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
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(0x555 + (((nr) - 7) * 2)))
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#define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
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(0x550 + (nr) - 7))
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#define W83627EHF_REG_TEMP1 0x27
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#define W83627EHF_REG_TEMP1_HYST 0x3a
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#define W83627EHF_REG_TEMP1_OVER 0x39
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static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
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static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
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static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
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static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
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/* Fan clock dividers are spread over the following five registers */
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#define W83627EHF_REG_FANDIV1 0x47
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#define W83627EHF_REG_FANDIV2 0x4B
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#define W83627EHF_REG_VBAT 0x5D
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#define W83627EHF_REG_DIODE 0x59
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#define W83627EHF_REG_SMI_OVT 0x4C
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#define W83627EHF_REG_ALARM1 0x459
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#define W83627EHF_REG_ALARM2 0x45A
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#define W83627EHF_REG_ALARM3 0x45B
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/* SmartFan registers */
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/* DC or PWM output fan configuration */
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static const u8 W83627EHF_REG_PWM_ENABLE[] = {
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0x04, /* SYS FAN0 output mode and PWM mode */
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0x04, /* CPU FAN0 output mode and PWM mode */
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0x12, /* AUX FAN mode */
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0x62, /* CPU fan1 mode */
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};
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static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
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static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
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/* FAN Duty Cycle, be used to control */
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static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
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static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
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static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
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/* Advanced Fan control, some values are common for all fans */
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static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
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static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 };
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/*
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* Conversions
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*/
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/* 1 is PWM mode, output in ms */
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static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
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{
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return mode ? 100 * reg : 400 * reg;
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}
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static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
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{
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return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
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(msec + 200) / 400), 1, 255);
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}
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static inline unsigned int
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fan_from_reg(u8 reg, unsigned int div)
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{
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if (reg == 0 || reg == 255)
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return 0;
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return 1350000U / (reg * div);
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}
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static inline unsigned int
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div_from_reg(u8 reg)
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{
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return 1 << reg;
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}
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static inline int
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temp1_from_reg(s8 reg)
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{
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return reg * 1000;
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}
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static inline s8
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temp1_to_reg(int temp, int min, int max)
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{
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if (temp <= min)
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return min / 1000;
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if (temp >= max)
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return max / 1000;
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if (temp < 0)
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return (temp - 500) / 1000;
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return (temp + 500) / 1000;
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}
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/* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
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static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
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static inline long in_from_reg(u8 reg, u8 nr)
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{
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return reg * scale_in[nr];
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}
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static inline u8 in_to_reg(u32 val, u8 nr)
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{
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return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
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}
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/*
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* Data structures and manipulation thereof
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*/
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struct w83627ehf_data {
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int addr; /* IO base of hw monitor block */
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const char *name;
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struct class_device *class_dev;
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struct mutex lock;
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struct mutex update_lock;
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char valid; /* !=0 if following fields are valid */
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unsigned long last_updated; /* In jiffies */
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/* Register values */
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u8 in_num; /* number of in inputs we have */
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u8 in[10]; /* Register value */
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u8 in_max[10]; /* Register value */
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u8 in_min[10]; /* Register value */
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u8 fan[5];
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u8 fan_min[5];
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u8 fan_div[5];
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u8 has_fan; /* some fan inputs can be disabled */
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s8 temp1;
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s8 temp1_max;
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s8 temp1_max_hyst;
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s16 temp[2];
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s16 temp_max[2];
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s16 temp_max_hyst[2];
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u32 alarms;
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u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
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u8 pwm_enable[4]; /* 1->manual
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2->thermal cruise (also called SmartFan I) */
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u8 pwm[4];
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u8 target_temp[4];
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u8 tolerance[4];
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u8 fan_min_output[4]; /* minimum fan speed */
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u8 fan_stop_time[4];
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u8 vid;
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u8 vrm;
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};
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struct w83627ehf_sio_data {
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int sioreg;
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enum kinds kind;
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};
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static inline int is_word_sized(u16 reg)
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{
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return (((reg & 0xff00) == 0x100
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|| (reg & 0xff00) == 0x200)
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&& ((reg & 0x00ff) == 0x50
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|| (reg & 0x00ff) == 0x53
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|| (reg & 0x00ff) == 0x55));
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}
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/* We assume that the default bank is 0, thus the following two functions do
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nothing for registers which live in bank 0. For others, they respectively
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set the bank register to the correct value (before the register is
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accessed), and back to 0 (afterwards). */
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static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
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{
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if (reg & 0xff00) {
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outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
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outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
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}
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}
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static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
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{
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if (reg & 0xff00) {
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outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
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outb_p(0, data->addr + DATA_REG_OFFSET);
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}
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}
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static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
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{
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int res, word_sized = is_word_sized(reg);
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mutex_lock(&data->lock);
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w83627ehf_set_bank(data, reg);
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outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
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res = inb_p(data->addr + DATA_REG_OFFSET);
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if (word_sized) {
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outb_p((reg & 0xff) + 1,
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data->addr + ADDR_REG_OFFSET);
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res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
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}
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w83627ehf_reset_bank(data, reg);
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mutex_unlock(&data->lock);
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return res;
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}
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static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
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{
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int word_sized = is_word_sized(reg);
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mutex_lock(&data->lock);
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w83627ehf_set_bank(data, reg);
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outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
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if (word_sized) {
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outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
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outb_p((reg & 0xff) + 1,
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data->addr + ADDR_REG_OFFSET);
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}
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outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
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w83627ehf_reset_bank(data, reg);
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mutex_unlock(&data->lock);
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return 0;
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}
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/* This function assumes that the caller holds data->update_lock */
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static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
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{
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u8 reg;
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switch (nr) {
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case 0:
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reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
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| ((data->fan_div[0] & 0x03) << 4);
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/* fan5 input control bit is write only, compute the value */
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reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
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w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
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reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
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| ((data->fan_div[0] & 0x04) << 3);
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w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
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break;
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case 1:
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reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
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| ((data->fan_div[1] & 0x03) << 6);
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/* fan5 input control bit is write only, compute the value */
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reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
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w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
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reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
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| ((data->fan_div[1] & 0x04) << 4);
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w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
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break;
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case 2:
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reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
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| ((data->fan_div[2] & 0x03) << 6);
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w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
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reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
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| ((data->fan_div[2] & 0x04) << 5);
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w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
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break;
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case 3:
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reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
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| (data->fan_div[3] & 0x03);
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w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
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reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
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| ((data->fan_div[3] & 0x04) << 5);
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w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
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break;
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case 4:
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reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
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| ((data->fan_div[4] & 0x03) << 2)
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| ((data->fan_div[4] & 0x04) << 5);
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w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
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break;
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}
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}
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static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
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{
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struct w83627ehf_data *data = dev_get_drvdata(dev);
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int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
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int i;
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mutex_lock(&data->update_lock);
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if (time_after(jiffies, data->last_updated + HZ + HZ/2)
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|| !data->valid) {
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/* Fan clock dividers */
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i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
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data->fan_div[0] = (i >> 4) & 0x03;
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data->fan_div[1] = (i >> 6) & 0x03;
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i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
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data->fan_div[2] = (i >> 6) & 0x03;
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i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
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data->fan_div[0] |= (i >> 3) & 0x04;
|
|
data->fan_div[1] |= (i >> 4) & 0x04;
|
|
data->fan_div[2] |= (i >> 5) & 0x04;
|
|
if (data->has_fan & ((1 << 3) | (1 << 4))) {
|
|
i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
|
|
data->fan_div[3] = i & 0x03;
|
|
data->fan_div[4] = ((i >> 2) & 0x03)
|
|
| ((i >> 5) & 0x04);
|
|
}
|
|
if (data->has_fan & (1 << 3)) {
|
|
i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
|
|
data->fan_div[3] |= (i >> 5) & 0x04;
|
|
}
|
|
|
|
/* Measured voltages and limits */
|
|
for (i = 0; i < data->in_num; i++) {
|
|
data->in[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_IN(i));
|
|
data->in_min[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_IN_MIN(i));
|
|
data->in_max[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_IN_MAX(i));
|
|
}
|
|
|
|
/* Measured fan speeds and limits */
|
|
for (i = 0; i < 5; i++) {
|
|
if (!(data->has_fan & (1 << i)))
|
|
continue;
|
|
|
|
data->fan[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_FAN[i]);
|
|
data->fan_min[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_FAN_MIN[i]);
|
|
|
|
/* If we failed to measure the fan speed and clock
|
|
divider can be increased, let's try that for next
|
|
time */
|
|
if (data->fan[i] == 0xff
|
|
&& data->fan_div[i] < 0x07) {
|
|
dev_dbg(dev, "Increasing fan%d "
|
|
"clock divider from %u to %u\n",
|
|
i + 1, div_from_reg(data->fan_div[i]),
|
|
div_from_reg(data->fan_div[i] + 1));
|
|
data->fan_div[i]++;
|
|
w83627ehf_write_fan_div(data, i);
|
|
/* Preserve min limit if possible */
|
|
if (data->fan_min[i] >= 2
|
|
&& data->fan_min[i] != 255)
|
|
w83627ehf_write_value(data,
|
|
W83627EHF_REG_FAN_MIN[i],
|
|
(data->fan_min[i] /= 2));
|
|
}
|
|
}
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
/* pwmcfg, tolarance mapped for i=0, i=1 to same reg */
|
|
if (i != 1) {
|
|
pwmcfg = w83627ehf_read_value(data,
|
|
W83627EHF_REG_PWM_ENABLE[i]);
|
|
tolerance = w83627ehf_read_value(data,
|
|
W83627EHF_REG_TOLERANCE[i]);
|
|
}
|
|
data->pwm_mode[i] =
|
|
((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
|
|
? 0 : 1;
|
|
data->pwm_enable[i] =
|
|
((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
|
|
& 3) + 1;
|
|
data->pwm[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_PWM[i]);
|
|
data->fan_min_output[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_FAN_MIN_OUTPUT[i]);
|
|
data->fan_stop_time[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_FAN_STOP_TIME[i]);
|
|
data->target_temp[i] =
|
|
w83627ehf_read_value(data,
|
|
W83627EHF_REG_TARGET[i]) &
|
|
(data->pwm_mode[i] == 1 ? 0x7f : 0xff);
|
|
data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
|
|
& 0x0f;
|
|
}
|
|
|
|
/* Measured temperatures and limits */
|
|
data->temp1 = w83627ehf_read_value(data,
|
|
W83627EHF_REG_TEMP1);
|
|
data->temp1_max = w83627ehf_read_value(data,
|
|
W83627EHF_REG_TEMP1_OVER);
|
|
data->temp1_max_hyst = w83627ehf_read_value(data,
|
|
W83627EHF_REG_TEMP1_HYST);
|
|
for (i = 0; i < 2; i++) {
|
|
data->temp[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_TEMP[i]);
|
|
data->temp_max[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_TEMP_OVER[i]);
|
|
data->temp_max_hyst[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_TEMP_HYST[i]);
|
|
}
|
|
|
|
data->alarms = w83627ehf_read_value(data,
|
|
W83627EHF_REG_ALARM1) |
|
|
(w83627ehf_read_value(data,
|
|
W83627EHF_REG_ALARM2) << 8) |
|
|
(w83627ehf_read_value(data,
|
|
W83627EHF_REG_ALARM3) << 16);
|
|
|
|
data->last_updated = jiffies;
|
|
data->valid = 1;
|
|
}
|
|
|
|
mutex_unlock(&data->update_lock);
|
|
return data;
|
|
}
|
|
|
|
/*
|
|
* Sysfs callback functions
|
|
*/
|
|
#define show_in_reg(reg) \
|
|
static ssize_t \
|
|
show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
char *buf) \
|
|
{ \
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
|
|
}
|
|
show_in_reg(in)
|
|
show_in_reg(in_min)
|
|
show_in_reg(in_max)
|
|
|
|
#define store_in_reg(REG, reg) \
|
|
static ssize_t \
|
|
store_in_##reg (struct device *dev, struct device_attribute *attr, \
|
|
const char *buf, size_t count) \
|
|
{ \
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
u32 val = simple_strtoul(buf, NULL, 10); \
|
|
\
|
|
mutex_lock(&data->update_lock); \
|
|
data->in_##reg[nr] = in_to_reg(val, nr); \
|
|
w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
|
|
data->in_##reg[nr]); \
|
|
mutex_unlock(&data->update_lock); \
|
|
return count; \
|
|
}
|
|
|
|
store_in_reg(MIN, min)
|
|
store_in_reg(MAX, max)
|
|
|
|
static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
|
|
{
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev);
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
int nr = sensor_attr->index;
|
|
return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
|
|
}
|
|
|
|
static struct sensor_device_attribute sda_in_input[] = {
|
|
SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
|
|
SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
|
|
SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
|
|
SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
|
|
SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
|
|
SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
|
|
SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
|
|
SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
|
|
SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
|
|
SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_in_alarm[] = {
|
|
SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
|
|
SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
|
|
SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
|
|
SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
|
|
SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
|
|
SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
|
|
SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
|
|
SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
|
|
SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
|
|
SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_in_min[] = {
|
|
SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
|
|
SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
|
|
SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
|
|
SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
|
|
SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
|
|
SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
|
|
SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
|
|
SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
|
|
SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
|
|
SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_in_max[] = {
|
|
SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
|
|
SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
|
|
SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
|
|
SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
|
|
SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
|
|
SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
|
|
SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
|
|
SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
|
|
SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
|
|
SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
|
|
};
|
|
|
|
#define show_fan_reg(reg) \
|
|
static ssize_t \
|
|
show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
char *buf) \
|
|
{ \
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
return sprintf(buf, "%d\n", \
|
|
fan_from_reg(data->reg[nr], \
|
|
div_from_reg(data->fan_div[nr]))); \
|
|
}
|
|
show_fan_reg(fan);
|
|
show_fan_reg(fan_min);
|
|
|
|
static ssize_t
|
|
show_fan_div(struct device *dev, struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev);
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
int nr = sensor_attr->index;
|
|
return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
|
|
}
|
|
|
|
static ssize_t
|
|
store_fan_min(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
int nr = sensor_attr->index;
|
|
unsigned int val = simple_strtoul(buf, NULL, 10);
|
|
unsigned int reg;
|
|
u8 new_div;
|
|
|
|
mutex_lock(&data->update_lock);
|
|
if (!val) {
|
|
/* No min limit, alarm disabled */
|
|
data->fan_min[nr] = 255;
|
|
new_div = data->fan_div[nr]; /* No change */
|
|
dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
|
|
} else if ((reg = 1350000U / val) >= 128 * 255) {
|
|
/* Speed below this value cannot possibly be represented,
|
|
even with the highest divider (128) */
|
|
data->fan_min[nr] = 254;
|
|
new_div = 7; /* 128 == (1 << 7) */
|
|
dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
|
|
"minimum\n", nr + 1, val, fan_from_reg(254, 128));
|
|
} else if (!reg) {
|
|
/* Speed above this value cannot possibly be represented,
|
|
even with the lowest divider (1) */
|
|
data->fan_min[nr] = 1;
|
|
new_div = 0; /* 1 == (1 << 0) */
|
|
dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
|
|
"maximum\n", nr + 1, val, fan_from_reg(1, 1));
|
|
} else {
|
|
/* Automatically pick the best divider, i.e. the one such
|
|
that the min limit will correspond to a register value
|
|
in the 96..192 range */
|
|
new_div = 0;
|
|
while (reg > 192 && new_div < 7) {
|
|
reg >>= 1;
|
|
new_div++;
|
|
}
|
|
data->fan_min[nr] = reg;
|
|
}
|
|
|
|
/* Write both the fan clock divider (if it changed) and the new
|
|
fan min (unconditionally) */
|
|
if (new_div != data->fan_div[nr]) {
|
|
/* Preserve the fan speed reading */
|
|
if (data->fan[nr] != 0xff) {
|
|
if (new_div > data->fan_div[nr])
|
|
data->fan[nr] >>= new_div - data->fan_div[nr];
|
|
else if (data->fan[nr] & 0x80)
|
|
data->fan[nr] = 0xff;
|
|
else
|
|
data->fan[nr] <<= data->fan_div[nr] - new_div;
|
|
}
|
|
|
|
dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
|
|
nr + 1, div_from_reg(data->fan_div[nr]),
|
|
div_from_reg(new_div));
|
|
data->fan_div[nr] = new_div;
|
|
w83627ehf_write_fan_div(data, nr);
|
|
/* Give the chip time to sample a new speed value */
|
|
data->last_updated = jiffies;
|
|
}
|
|
w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
|
|
data->fan_min[nr]);
|
|
mutex_unlock(&data->update_lock);
|
|
|
|
return count;
|
|
}
|
|
|
|
static struct sensor_device_attribute sda_fan_input[] = {
|
|
SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
|
|
SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
|
|
SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
|
|
SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
|
|
SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_fan_alarm[] = {
|
|
SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
|
|
SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
|
|
SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
|
|
SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
|
|
SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_fan_min[] = {
|
|
SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
|
|
store_fan_min, 0),
|
|
SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
|
|
store_fan_min, 1),
|
|
SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
|
|
store_fan_min, 2),
|
|
SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
|
|
store_fan_min, 3),
|
|
SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
|
|
store_fan_min, 4),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_fan_div[] = {
|
|
SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
|
|
SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
|
|
SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
|
|
SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
|
|
SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
|
|
};
|
|
|
|
#define show_temp1_reg(reg) \
|
|
static ssize_t \
|
|
show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
char *buf) \
|
|
{ \
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev); \
|
|
return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
|
|
}
|
|
show_temp1_reg(temp1);
|
|
show_temp1_reg(temp1_max);
|
|
show_temp1_reg(temp1_max_hyst);
|
|
|
|
#define store_temp1_reg(REG, reg) \
|
|
static ssize_t \
|
|
store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
|
|
const char *buf, size_t count) \
|
|
{ \
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev); \
|
|
u32 val = simple_strtoul(buf, NULL, 10); \
|
|
\
|
|
mutex_lock(&data->update_lock); \
|
|
data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
|
|
w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
|
|
data->temp1_##reg); \
|
|
mutex_unlock(&data->update_lock); \
|
|
return count; \
|
|
}
|
|
store_temp1_reg(OVER, max);
|
|
store_temp1_reg(HYST, max_hyst);
|
|
|
|
#define show_temp_reg(reg) \
|
|
static ssize_t \
|
|
show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
char *buf) \
|
|
{ \
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
return sprintf(buf, "%d\n", \
|
|
LM75_TEMP_FROM_REG(data->reg[nr])); \
|
|
}
|
|
show_temp_reg(temp);
|
|
show_temp_reg(temp_max);
|
|
show_temp_reg(temp_max_hyst);
|
|
|
|
#define store_temp_reg(REG, reg) \
|
|
static ssize_t \
|
|
store_##reg(struct device *dev, struct device_attribute *attr, \
|
|
const char *buf, size_t count) \
|
|
{ \
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
u32 val = simple_strtoul(buf, NULL, 10); \
|
|
\
|
|
mutex_lock(&data->update_lock); \
|
|
data->reg[nr] = LM75_TEMP_TO_REG(val); \
|
|
w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
|
|
data->reg[nr]); \
|
|
mutex_unlock(&data->update_lock); \
|
|
return count; \
|
|
}
|
|
store_temp_reg(OVER, temp_max);
|
|
store_temp_reg(HYST, temp_max_hyst);
|
|
|
|
static struct sensor_device_attribute sda_temp[] = {
|
|
SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
|
|
SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
|
|
SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
|
|
SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
|
|
store_temp1_max, 0),
|
|
SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
|
|
store_temp_max, 0),
|
|
SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
|
|
store_temp_max, 1),
|
|
SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
|
|
store_temp1_max_hyst, 0),
|
|
SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
|
|
store_temp_max_hyst, 0),
|
|
SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
|
|
store_temp_max_hyst, 1),
|
|
SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
|
|
SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
|
|
SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
|
|
};
|
|
|
|
#define show_pwm_reg(reg) \
|
|
static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
|
|
char *buf) \
|
|
{ \
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
return sprintf(buf, "%d\n", data->reg[nr]); \
|
|
}
|
|
|
|
show_pwm_reg(pwm_mode)
|
|
show_pwm_reg(pwm_enable)
|
|
show_pwm_reg(pwm)
|
|
|
|
static ssize_t
|
|
store_pwm_mode(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
int nr = sensor_attr->index;
|
|
u32 val = simple_strtoul(buf, NULL, 10);
|
|
u16 reg;
|
|
|
|
if (val > 1)
|
|
return -EINVAL;
|
|
mutex_lock(&data->update_lock);
|
|
reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
|
|
data->pwm_mode[nr] = val;
|
|
reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
|
|
if (!val)
|
|
reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
|
|
w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
|
|
mutex_unlock(&data->update_lock);
|
|
return count;
|
|
}
|
|
|
|
static ssize_t
|
|
store_pwm(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
int nr = sensor_attr->index;
|
|
u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
|
|
|
|
mutex_lock(&data->update_lock);
|
|
data->pwm[nr] = val;
|
|
w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
|
|
mutex_unlock(&data->update_lock);
|
|
return count;
|
|
}
|
|
|
|
static ssize_t
|
|
store_pwm_enable(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
int nr = sensor_attr->index;
|
|
u32 val = simple_strtoul(buf, NULL, 10);
|
|
u16 reg;
|
|
|
|
if (!val || (val > 2)) /* only modes 1 and 2 are supported */
|
|
return -EINVAL;
|
|
mutex_lock(&data->update_lock);
|
|
reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
|
|
data->pwm_enable[nr] = val;
|
|
reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
|
|
reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
|
|
w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
|
|
mutex_unlock(&data->update_lock);
|
|
return count;
|
|
}
|
|
|
|
|
|
#define show_tol_temp(reg) \
|
|
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
char *buf) \
|
|
{ \
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
|
|
}
|
|
|
|
show_tol_temp(tolerance)
|
|
show_tol_temp(target_temp)
|
|
|
|
static ssize_t
|
|
store_target_temp(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
int nr = sensor_attr->index;
|
|
u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
|
|
|
|
mutex_lock(&data->update_lock);
|
|
data->target_temp[nr] = val;
|
|
w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
|
|
mutex_unlock(&data->update_lock);
|
|
return count;
|
|
}
|
|
|
|
static ssize_t
|
|
store_tolerance(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
|
|
int nr = sensor_attr->index;
|
|
u16 reg;
|
|
/* Limit the temp to 0C - 15C */
|
|
u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
|
|
|
|
mutex_lock(&data->update_lock);
|
|
reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
|
|
data->tolerance[nr] = val;
|
|
if (nr == 1)
|
|
reg = (reg & 0x0f) | (val << 4);
|
|
else
|
|
reg = (reg & 0xf0) | val;
|
|
w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
|
|
mutex_unlock(&data->update_lock);
|
|
return count;
|
|
}
|
|
|
|
static struct sensor_device_attribute sda_pwm[] = {
|
|
SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
|
|
SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
|
|
SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
|
|
SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_pwm_mode[] = {
|
|
SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
|
|
store_pwm_mode, 0),
|
|
SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
|
|
store_pwm_mode, 1),
|
|
SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
|
|
store_pwm_mode, 2),
|
|
SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
|
|
store_pwm_mode, 3),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_pwm_enable[] = {
|
|
SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
|
|
store_pwm_enable, 0),
|
|
SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
|
|
store_pwm_enable, 1),
|
|
SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
|
|
store_pwm_enable, 2),
|
|
SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
|
|
store_pwm_enable, 3),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_target_temp[] = {
|
|
SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
|
|
store_target_temp, 0),
|
|
SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
|
|
store_target_temp, 1),
|
|
SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
|
|
store_target_temp, 2),
|
|
SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
|
|
store_target_temp, 3),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_tolerance[] = {
|
|
SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
|
|
store_tolerance, 0),
|
|
SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
|
|
store_tolerance, 1),
|
|
SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
|
|
store_tolerance, 2),
|
|
SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
|
|
store_tolerance, 3),
|
|
};
|
|
|
|
/* Smart Fan registers */
|
|
|
|
#define fan_functions(reg, REG) \
|
|
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
char *buf) \
|
|
{ \
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
return sprintf(buf, "%d\n", data->reg[nr]); \
|
|
}\
|
|
static ssize_t \
|
|
store_##reg(struct device *dev, struct device_attribute *attr, \
|
|
const char *buf, size_t count) \
|
|
{\
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
|
|
mutex_lock(&data->update_lock); \
|
|
data->reg[nr] = val; \
|
|
w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
|
|
mutex_unlock(&data->update_lock); \
|
|
return count; \
|
|
}
|
|
|
|
fan_functions(fan_min_output, FAN_MIN_OUTPUT)
|
|
|
|
#define fan_time_functions(reg, REG) \
|
|
static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
|
|
char *buf) \
|
|
{ \
|
|
struct w83627ehf_data *data = w83627ehf_update_device(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
return sprintf(buf, "%d\n", \
|
|
step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
|
|
} \
|
|
\
|
|
static ssize_t \
|
|
store_##reg(struct device *dev, struct device_attribute *attr, \
|
|
const char *buf, size_t count) \
|
|
{ \
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev); \
|
|
struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
|
|
int nr = sensor_attr->index; \
|
|
u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
|
|
data->pwm_mode[nr]); \
|
|
mutex_lock(&data->update_lock); \
|
|
data->reg[nr] = val; \
|
|
w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
|
|
mutex_unlock(&data->update_lock); \
|
|
return count; \
|
|
} \
|
|
|
|
fan_time_functions(fan_stop_time, FAN_STOP_TIME)
|
|
|
|
static ssize_t show_name(struct device *dev, struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
|
|
return sprintf(buf, "%s\n", data->name);
|
|
}
|
|
static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
|
|
|
|
static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
|
|
SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
|
|
store_fan_stop_time, 3),
|
|
SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
|
|
store_fan_min_output, 3),
|
|
};
|
|
|
|
static struct sensor_device_attribute sda_sf3_arrays[] = {
|
|
SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
|
|
store_fan_stop_time, 0),
|
|
SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
|
|
store_fan_stop_time, 1),
|
|
SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
|
|
store_fan_stop_time, 2),
|
|
SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
|
|
store_fan_min_output, 0),
|
|
SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
|
|
store_fan_min_output, 1),
|
|
SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
|
|
store_fan_min_output, 2),
|
|
};
|
|
|
|
static ssize_t
|
|
show_vid(struct device *dev, struct device_attribute *attr, char *buf)
|
|
{
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
|
|
}
|
|
static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
|
|
|
|
/*
|
|
* Driver and device management
|
|
*/
|
|
|
|
static void w83627ehf_device_remove_files(struct device *dev)
|
|
{
|
|
/* some entries in the following arrays may not have been used in
|
|
* device_create_file(), but device_remove_file() will ignore them */
|
|
int i;
|
|
struct w83627ehf_data *data = dev_get_drvdata(dev);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
|
|
device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
|
|
for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
|
|
device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
|
|
for (i = 0; i < data->in_num; i++) {
|
|
device_remove_file(dev, &sda_in_input[i].dev_attr);
|
|
device_remove_file(dev, &sda_in_alarm[i].dev_attr);
|
|
device_remove_file(dev, &sda_in_min[i].dev_attr);
|
|
device_remove_file(dev, &sda_in_max[i].dev_attr);
|
|
}
|
|
for (i = 0; i < 5; i++) {
|
|
device_remove_file(dev, &sda_fan_input[i].dev_attr);
|
|
device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
|
|
device_remove_file(dev, &sda_fan_div[i].dev_attr);
|
|
device_remove_file(dev, &sda_fan_min[i].dev_attr);
|
|
}
|
|
for (i = 0; i < 4; i++) {
|
|
device_remove_file(dev, &sda_pwm[i].dev_attr);
|
|
device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
|
|
device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
|
|
device_remove_file(dev, &sda_target_temp[i].dev_attr);
|
|
device_remove_file(dev, &sda_tolerance[i].dev_attr);
|
|
}
|
|
for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
|
|
device_remove_file(dev, &sda_temp[i].dev_attr);
|
|
|
|
device_remove_file(dev, &dev_attr_name);
|
|
if (data->vid != 0x3f)
|
|
device_remove_file(dev, &dev_attr_cpu0_vid);
|
|
}
|
|
|
|
/* Get the monitoring functions started */
|
|
static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
|
|
{
|
|
int i;
|
|
u8 tmp;
|
|
|
|
/* Start monitoring is needed */
|
|
tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
|
|
if (!(tmp & 0x01))
|
|
w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
|
|
tmp | 0x01);
|
|
|
|
/* Enable temp2 and temp3 if needed */
|
|
for (i = 0; i < 2; i++) {
|
|
tmp = w83627ehf_read_value(data,
|
|
W83627EHF_REG_TEMP_CONFIG[i]);
|
|
if (tmp & 0x01)
|
|
w83627ehf_write_value(data,
|
|
W83627EHF_REG_TEMP_CONFIG[i],
|
|
tmp & 0xfe);
|
|
}
|
|
}
|
|
|
|
static int __devinit w83627ehf_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct w83627ehf_sio_data *sio_data = dev->platform_data;
|
|
struct w83627ehf_data *data;
|
|
struct resource *res;
|
|
u8 fan4pin, fan5pin, en_vrm10;
|
|
int i, err = 0;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
|
|
if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
|
|
err = -EBUSY;
|
|
dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
|
|
(unsigned long)res->start,
|
|
(unsigned long)res->start + IOREGION_LENGTH - 1);
|
|
goto exit;
|
|
}
|
|
|
|
if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
|
|
err = -ENOMEM;
|
|
goto exit_release;
|
|
}
|
|
|
|
data->addr = res->start;
|
|
mutex_init(&data->lock);
|
|
mutex_init(&data->update_lock);
|
|
data->name = w83627ehf_device_names[sio_data->kind];
|
|
platform_set_drvdata(pdev, data);
|
|
|
|
/* 627EHG and 627EHF have 10 voltage inputs; DHG has 9 */
|
|
data->in_num = (sio_data->kind == w83627dhg) ? 9 : 10;
|
|
|
|
/* Initialize the chip */
|
|
w83627ehf_init_device(data);
|
|
|
|
/* A few vars need to be filled upon startup */
|
|
for (i = 0; i < 5; i++)
|
|
data->fan_min[i] = w83627ehf_read_value(data,
|
|
W83627EHF_REG_FAN_MIN[i]);
|
|
|
|
data->vrm = vid_which_vrm();
|
|
superio_enter(sio_data->sioreg);
|
|
/* Set VID input sensibility if needed. In theory the BIOS should
|
|
have set it, but in practice it's not always the case. */
|
|
en_vrm10 = superio_inb(sio_data->sioreg, SIO_REG_EN_VRM10);
|
|
if ((en_vrm10 & 0x08) && data->vrm != 100) {
|
|
dev_warn(dev, "Setting VID input voltage to TTL\n");
|
|
superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
|
|
en_vrm10 & ~0x08);
|
|
} else if (!(en_vrm10 & 0x08) && data->vrm == 100) {
|
|
dev_warn(dev, "Setting VID input voltage to VRM10\n");
|
|
superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
|
|
en_vrm10 | 0x08);
|
|
}
|
|
/* Read VID value */
|
|
superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
|
|
if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80)
|
|
data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f;
|
|
else {
|
|
dev_info(dev, "VID pins in output mode, CPU VID not "
|
|
"available\n");
|
|
data->vid = 0x3f;
|
|
}
|
|
|
|
/* fan4 and fan5 share some pins with the GPIO and serial flash */
|
|
|
|
fan5pin = superio_inb(sio_data->sioreg, 0x24) & 0x2;
|
|
fan4pin = superio_inb(sio_data->sioreg, 0x29) & 0x6;
|
|
superio_exit(sio_data->sioreg);
|
|
|
|
/* It looks like fan4 and fan5 pins can be alternatively used
|
|
as fan on/off switches, but fan5 control is write only :/
|
|
We assume that if the serial interface is disabled, designers
|
|
connected fan5 as input unless they are emitting log 1, which
|
|
is not the default. */
|
|
|
|
data->has_fan = 0x07; /* fan1, fan2 and fan3 */
|
|
i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
|
|
if ((i & (1 << 2)) && (!fan4pin))
|
|
data->has_fan |= (1 << 3);
|
|
if (!(i & (1 << 1)) && (!fan5pin))
|
|
data->has_fan |= (1 << 4);
|
|
|
|
/* Register sysfs hooks */
|
|
for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
|
|
if ((err = device_create_file(dev,
|
|
&sda_sf3_arrays[i].dev_attr)))
|
|
goto exit_remove;
|
|
|
|
/* if fan4 is enabled create the sf3 files for it */
|
|
if (data->has_fan & (1 << 3))
|
|
for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
|
|
if ((err = device_create_file(dev,
|
|
&sda_sf3_arrays_fan4[i].dev_attr)))
|
|
goto exit_remove;
|
|
}
|
|
|
|
for (i = 0; i < data->in_num; i++)
|
|
if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_in_alarm[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_in_min[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_in_max[i].dev_attr)))
|
|
goto exit_remove;
|
|
|
|
for (i = 0; i < 5; i++) {
|
|
if (data->has_fan & (1 << i)) {
|
|
if ((err = device_create_file(dev,
|
|
&sda_fan_input[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_fan_alarm[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_fan_div[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_fan_min[i].dev_attr)))
|
|
goto exit_remove;
|
|
if (i < 4 && /* w83627ehf only has 4 pwm */
|
|
((err = device_create_file(dev,
|
|
&sda_pwm[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_pwm_mode[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_pwm_enable[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_target_temp[i].dev_attr))
|
|
|| (err = device_create_file(dev,
|
|
&sda_tolerance[i].dev_attr))))
|
|
goto exit_remove;
|
|
}
|
|
}
|
|
|
|
for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
|
|
if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
|
|
goto exit_remove;
|
|
|
|
err = device_create_file(dev, &dev_attr_name);
|
|
if (err)
|
|
goto exit_remove;
|
|
|
|
if (data->vid != 0x3f) {
|
|
err = device_create_file(dev, &dev_attr_cpu0_vid);
|
|
if (err)
|
|
goto exit_remove;
|
|
}
|
|
|
|
data->class_dev = hwmon_device_register(dev);
|
|
if (IS_ERR(data->class_dev)) {
|
|
err = PTR_ERR(data->class_dev);
|
|
goto exit_remove;
|
|
}
|
|
|
|
return 0;
|
|
|
|
exit_remove:
|
|
w83627ehf_device_remove_files(dev);
|
|
kfree(data);
|
|
platform_set_drvdata(pdev, NULL);
|
|
exit_release:
|
|
release_region(res->start, IOREGION_LENGTH);
|
|
exit:
|
|
return err;
|
|
}
|
|
|
|
static int __devexit w83627ehf_remove(struct platform_device *pdev)
|
|
{
|
|
struct w83627ehf_data *data = platform_get_drvdata(pdev);
|
|
|
|
hwmon_device_unregister(data->class_dev);
|
|
w83627ehf_device_remove_files(&pdev->dev);
|
|
release_region(data->addr, IOREGION_LENGTH);
|
|
platform_set_drvdata(pdev, NULL);
|
|
kfree(data);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver w83627ehf_driver = {
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = DRVNAME,
|
|
},
|
|
.probe = w83627ehf_probe,
|
|
.remove = __devexit_p(w83627ehf_remove),
|
|
};
|
|
|
|
/* w83627ehf_find() looks for a '627 in the Super-I/O config space */
|
|
static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
|
|
struct w83627ehf_sio_data *sio_data)
|
|
{
|
|
static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
|
|
static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
|
|
static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
|
|
|
|
u16 val;
|
|
const char *sio_name;
|
|
|
|
superio_enter(sioaddr);
|
|
|
|
val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
|
|
| superio_inb(sioaddr, SIO_REG_DEVID + 1);
|
|
switch (val & SIO_ID_MASK) {
|
|
case SIO_W83627EHF_ID:
|
|
sio_data->kind = w83627ehf;
|
|
sio_name = sio_name_W83627EHF;
|
|
break;
|
|
case SIO_W83627EHG_ID:
|
|
sio_data->kind = w83627ehf;
|
|
sio_name = sio_name_W83627EHG;
|
|
break;
|
|
case SIO_W83627DHG_ID:
|
|
sio_data->kind = w83627dhg;
|
|
sio_name = sio_name_W83627DHG;
|
|
break;
|
|
default:
|
|
pr_info(DRVNAME ": unsupported chip ID: 0x%04x\n",
|
|
val);
|
|
superio_exit(sioaddr);
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* We have a known chip, find the HWM I/O address */
|
|
superio_select(sioaddr, W83627EHF_LD_HWM);
|
|
val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
|
|
| superio_inb(sioaddr, SIO_REG_ADDR + 1);
|
|
*addr = val & IOREGION_ALIGNMENT;
|
|
if (*addr == 0) {
|
|
printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
|
|
"device with a base I/O port 0.\n");
|
|
superio_exit(sioaddr);
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* Activate logical device if needed */
|
|
val = superio_inb(sioaddr, SIO_REG_ENABLE);
|
|
if (!(val & 0x01)) {
|
|
printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
|
|
"Sensor is probably unusable.\n");
|
|
superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
|
|
}
|
|
|
|
superio_exit(sioaddr);
|
|
pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
|
|
sio_data->sioreg = sioaddr;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* when Super-I/O functions move to a separate file, the Super-I/O
|
|
* bus will manage the lifetime of the device and this module will only keep
|
|
* track of the w83627ehf driver. But since we platform_device_alloc(), we
|
|
* must keep track of the device */
|
|
static struct platform_device *pdev;
|
|
|
|
static int __init sensors_w83627ehf_init(void)
|
|
{
|
|
int err;
|
|
unsigned short address;
|
|
struct resource res;
|
|
struct w83627ehf_sio_data sio_data;
|
|
|
|
/* initialize sio_data->kind and sio_data->sioreg.
|
|
*
|
|
* when Super-I/O functions move to a separate file, the Super-I/O
|
|
* driver will probe 0x2e and 0x4e and auto-detect the presence of a
|
|
* w83627ehf hardware monitor, and call probe() */
|
|
if (w83627ehf_find(0x2e, &address, &sio_data) &&
|
|
w83627ehf_find(0x4e, &address, &sio_data))
|
|
return -ENODEV;
|
|
|
|
err = platform_driver_register(&w83627ehf_driver);
|
|
if (err)
|
|
goto exit;
|
|
|
|
if (!(pdev = platform_device_alloc(DRVNAME, address))) {
|
|
err = -ENOMEM;
|
|
printk(KERN_ERR DRVNAME ": Device allocation failed\n");
|
|
goto exit_unregister;
|
|
}
|
|
|
|
err = platform_device_add_data(pdev, &sio_data,
|
|
sizeof(struct w83627ehf_sio_data));
|
|
if (err) {
|
|
printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
|
|
goto exit_device_put;
|
|
}
|
|
|
|
memset(&res, 0, sizeof(res));
|
|
res.name = DRVNAME;
|
|
res.start = address + IOREGION_OFFSET;
|
|
res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
|
|
res.flags = IORESOURCE_IO;
|
|
err = platform_device_add_resources(pdev, &res, 1);
|
|
if (err) {
|
|
printk(KERN_ERR DRVNAME ": Device resource addition failed "
|
|
"(%d)\n", err);
|
|
goto exit_device_put;
|
|
}
|
|
|
|
/* platform_device_add calls probe() */
|
|
err = platform_device_add(pdev);
|
|
if (err) {
|
|
printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
|
|
err);
|
|
goto exit_device_put;
|
|
}
|
|
|
|
return 0;
|
|
|
|
exit_device_put:
|
|
platform_device_put(pdev);
|
|
exit_unregister:
|
|
platform_driver_unregister(&w83627ehf_driver);
|
|
exit:
|
|
return err;
|
|
}
|
|
|
|
static void __exit sensors_w83627ehf_exit(void)
|
|
{
|
|
platform_device_unregister(pdev);
|
|
platform_driver_unregister(&w83627ehf_driver);
|
|
}
|
|
|
|
MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
|
|
MODULE_DESCRIPTION("W83627EHF driver");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
module_init(sensors_w83627ehf_init);
|
|
module_exit(sensors_w83627ehf_exit);
|