f9695df42c
Impact: minor bugfix The threshold handler on AMD (and soon on Intel) could be theoretically reentered by the hardware. This could lead to corrupted events because the machine check poll code assumes it is not reentered. Move the APIC ACK to the end of the interrupt handler to let the hardware avoid that. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
26 lines
613 B
C
26 lines
613 B
C
/* Common corrected MCE threshold handler code */
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <asm/mce.h>
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#include <asm/irq_vectors.h>
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#include <asm/idle.h>
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static void default_threshold_interrupt(void)
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{
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printk(KERN_ERR "Unexpected threshold interrupt at vector %x\n",
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THRESHOLD_APIC_VECTOR);
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}
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void (*mce_threshold_vector)(void) = default_threshold_interrupt;
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asmlinkage void mce_threshold_interrupt(void)
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{
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exit_idle();
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irq_enter();
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inc_irq_stat(irq_threshold_count);
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mce_threshold_vector();
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irq_exit();
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/* Ack only at the end to avoid potential reentry */
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ack_APIC_irq();
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}
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