602cc0c961
It doesn't guarantee the mt7921e gets started with ASPM L0 after each
machine reboot on every platform.
If mt7921e gets started with not ASPM L0, it would be possible that the
driver encounters time to time failure in mt7921_pci_probe, like a
weird chip identifier is read
[ 215.514503] mt7921e 0000:05:00.0: ASIC revision: feed0000
[ 216.604741] mt7921e: probe of 0000:05:00.0 failed with error -110
or failing to init hardware because the driver is not allowed to access the
register until the device is in ASPM L0 state. So, we call
__mt7921e_mcu_drv_pmctrl in early mt7921_pci_probe to force the device
to bring back to the L0 state for we can safely access registers in any
case.
In the patch, we move all functions from dma.c to pci.c and register mt76
bus operation earilier, that is the __mt7921e_mcu_drv_pmctrl depends on.
Fixes: bf3747ae2e ("mt76: mt7921: enable aspm by default")
Reported-by: Kai-Chuan Hsieh <kaichuan.hsieh@canonical.com>
Co-developed-by: Deren Wu <deren.wu@mediatek.com>
Signed-off-by: Deren Wu <deren.wu@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
126 lines
2.8 KiB
C
126 lines
2.8 KiB
C
// SPDX-License-Identifier: ISC
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/* Copyright (C) 2021 MediaTek Inc. */
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#include "mt7921.h"
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#include "mcu.h"
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int mt7921e_driver_own(struct mt7921_dev *dev)
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{
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u32 reg = mt7921_reg_map_l1(dev, MT_TOP_LPCR_HOST_BAND0);
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mt76_wr(dev, reg, MT_TOP_LPCR_HOST_DRV_OWN);
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if (!mt76_poll_msec(dev, reg, MT_TOP_LPCR_HOST_FW_OWN,
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0, 500)) {
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dev_err(dev->mt76.dev, "Timeout for driver own\n");
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return -EIO;
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}
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return 0;
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}
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static int
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mt7921_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
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int cmd, int *seq)
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{
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struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
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enum mt76_mcuq_id txq = MT_MCUQ_WM;
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int ret;
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ret = mt7921_mcu_fill_message(mdev, skb, cmd, seq);
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if (ret)
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return ret;
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if (cmd == MCU_CMD(FW_SCATTER))
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txq = MT_MCUQ_FWDL;
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return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[txq], skb, 0);
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}
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int mt7921e_mcu_init(struct mt7921_dev *dev)
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{
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static const struct mt76_mcu_ops mt7921_mcu_ops = {
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.headroom = sizeof(struct mt7921_mcu_txd),
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.mcu_skb_send_msg = mt7921_mcu_send_message,
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.mcu_parse_response = mt7921_mcu_parse_response,
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.mcu_restart = mt76_connac_mcu_restart,
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};
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int err;
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dev->mt76.mcu_ops = &mt7921_mcu_ops;
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err = mt7921e_driver_own(dev);
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if (err)
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return err;
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err = mt7921_run_firmware(dev);
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mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);
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return err;
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}
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int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev)
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{
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int i, err = 0;
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for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) {
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mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_CLR_OWN);
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if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL,
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PCIE_LPCR_HOST_OWN_SYNC, 0, 50))
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break;
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}
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if (i == MT7921_DRV_OWN_RETRY_COUNT) {
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dev_err(dev->mt76.dev, "driver own failed\n");
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err = -EIO;
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}
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return err;
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}
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int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev)
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{
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struct mt76_phy *mphy = &dev->mt76.phy;
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struct mt76_connac_pm *pm = &dev->pm;
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int err;
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err = __mt7921e_mcu_drv_pmctrl(dev);
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if (err < 0)
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goto out;
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mt7921_wpdma_reinit_cond(dev);
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clear_bit(MT76_STATE_PM, &mphy->state);
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pm->stats.last_wake_event = jiffies;
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pm->stats.doze_time += pm->stats.last_wake_event -
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pm->stats.last_doze_event;
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out:
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return err;
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}
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int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev)
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{
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struct mt76_phy *mphy = &dev->mt76.phy;
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struct mt76_connac_pm *pm = &dev->pm;
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int i, err = 0;
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for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) {
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mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_SET_OWN);
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if (mt76_poll_msec(dev, MT_CONN_ON_LPCTL,
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PCIE_LPCR_HOST_OWN_SYNC, 4, 50))
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break;
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}
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if (i == MT7921_DRV_OWN_RETRY_COUNT) {
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dev_err(dev->mt76.dev, "firmware own failed\n");
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clear_bit(MT76_STATE_PM, &mphy->state);
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err = -EIO;
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}
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pm->stats.last_doze_event = jiffies;
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pm->stats.awake_time += pm->stats.last_doze_event -
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pm->stats.last_wake_event;
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return err;
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}
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