Codrin Ciubotariu 1a944729d8 clk: at91: sama7g5: fix parents of PDMCs' GCLK ...

Audio PLL can be used as parent by the GCLKs of PDMCs.

Fixes: cb783bbbcf ("clk: at91: sama7g5: add clock support for sama7g5")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220304182616.1920392-1-codrin.ciubotariu@microchip.com

2022-03-08 15:35:35 +01:00

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