forked from Minki/linux
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
258 lines
6.2 KiB
C
258 lines
6.2 KiB
C
/*
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* arch/ppc/syslib/mpc52xx_pic.c
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*
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* Programmable Interrupt Controller functions for the Freescale MPC52xx
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* embedded CPU.
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*
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*
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* Maintainer : Sylvain Munaut <tnt@246tNt.com>
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*
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* Based on (well, mostly copied from) the code from the 2.4 kernel by
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* Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg.
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*
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* Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
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* Copyright (C) 2003 Montavista Software, Inc
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/stddef.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/signal.h>
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#include <linux/stddef.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/irq.h>
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#include <asm/mpc52xx.h>
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static struct mpc52xx_intr __iomem *intr;
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static struct mpc52xx_sdma __iomem *sdma;
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static void
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mpc52xx_ic_disable(unsigned int irq)
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{
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u32 val;
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if (irq == MPC52xx_IRQ0) {
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val = in_be32(&intr->ctrl);
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val &= ~(1 << 11);
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out_be32(&intr->ctrl, val);
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}
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else if (irq < MPC52xx_IRQ1) {
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BUG();
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}
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else if (irq <= MPC52xx_IRQ3) {
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val = in_be32(&intr->ctrl);
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val &= ~(1 << (10 - (irq - MPC52xx_IRQ1)));
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out_be32(&intr->ctrl, val);
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}
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else if (irq < MPC52xx_SDMA_IRQ_BASE) {
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val = in_be32(&intr->main_mask);
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val |= 1 << (16 - (irq - MPC52xx_MAIN_IRQ_BASE));
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out_be32(&intr->main_mask, val);
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}
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else if (irq < MPC52xx_PERP_IRQ_BASE) {
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val = in_be32(&sdma->IntMask);
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val |= 1 << (irq - MPC52xx_SDMA_IRQ_BASE);
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out_be32(&sdma->IntMask, val);
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}
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else {
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val = in_be32(&intr->per_mask);
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val |= 1 << (31 - (irq - MPC52xx_PERP_IRQ_BASE));
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out_be32(&intr->per_mask, val);
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}
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}
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static void
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mpc52xx_ic_enable(unsigned int irq)
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{
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u32 val;
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if (irq == MPC52xx_IRQ0) {
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val = in_be32(&intr->ctrl);
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val |= 1 << 11;
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out_be32(&intr->ctrl, val);
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}
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else if (irq < MPC52xx_IRQ1) {
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BUG();
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}
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else if (irq <= MPC52xx_IRQ3) {
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val = in_be32(&intr->ctrl);
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val |= 1 << (10 - (irq - MPC52xx_IRQ1));
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out_be32(&intr->ctrl, val);
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}
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else if (irq < MPC52xx_SDMA_IRQ_BASE) {
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val = in_be32(&intr->main_mask);
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val &= ~(1 << (16 - (irq - MPC52xx_MAIN_IRQ_BASE)));
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out_be32(&intr->main_mask, val);
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}
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else if (irq < MPC52xx_PERP_IRQ_BASE) {
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val = in_be32(&sdma->IntMask);
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val &= ~(1 << (irq - MPC52xx_SDMA_IRQ_BASE));
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out_be32(&sdma->IntMask, val);
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}
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else {
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val = in_be32(&intr->per_mask);
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val &= ~(1 << (31 - (irq - MPC52xx_PERP_IRQ_BASE)));
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out_be32(&intr->per_mask, val);
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}
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}
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static void
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mpc52xx_ic_ack(unsigned int irq)
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{
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u32 val;
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/*
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* Only some irqs are reset here, others in interrupting hardware.
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*/
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switch (irq) {
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case MPC52xx_IRQ0:
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val = in_be32(&intr->ctrl);
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val |= 0x08000000;
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out_be32(&intr->ctrl, val);
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break;
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case MPC52xx_CCS_IRQ:
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val = in_be32(&intr->enc_status);
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val |= 0x00000400;
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out_be32(&intr->enc_status, val);
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break;
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case MPC52xx_IRQ1:
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val = in_be32(&intr->ctrl);
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val |= 0x04000000;
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out_be32(&intr->ctrl, val);
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break;
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case MPC52xx_IRQ2:
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val = in_be32(&intr->ctrl);
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val |= 0x02000000;
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out_be32(&intr->ctrl, val);
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break;
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case MPC52xx_IRQ3:
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val = in_be32(&intr->ctrl);
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val |= 0x01000000;
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out_be32(&intr->ctrl, val);
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break;
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default:
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if (irq >= MPC52xx_SDMA_IRQ_BASE
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&& irq < (MPC52xx_SDMA_IRQ_BASE + MPC52xx_SDMA_IRQ_NUM)) {
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out_be32(&sdma->IntPend,
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1 << (irq - MPC52xx_SDMA_IRQ_BASE));
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}
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break;
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}
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}
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static void
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mpc52xx_ic_disable_and_ack(unsigned int irq)
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{
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mpc52xx_ic_disable(irq);
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mpc52xx_ic_ack(irq);
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}
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static void
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mpc52xx_ic_end(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
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mpc52xx_ic_enable(irq);
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}
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static struct hw_interrupt_type mpc52xx_ic = {
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.typename = " MPC52xx ",
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.enable = mpc52xx_ic_enable,
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.disable = mpc52xx_ic_disable,
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.ack = mpc52xx_ic_disable_and_ack,
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.end = mpc52xx_ic_end,
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};
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void __init
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mpc52xx_init_irq(void)
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{
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int i;
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u32 intr_ctrl;
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/* Remap the necessary zones */
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intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
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sdma = ioremap(MPC52xx_PA(MPC52xx_SDMA_OFFSET), MPC52xx_SDMA_SIZE);
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if ((intr==NULL) || (sdma==NULL))
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panic("Can't ioremap PIC/SDMA register for init_irq !");
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/* Disable all interrupt sources. */
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out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */
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out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
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out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */
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out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */
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intr_ctrl = in_be32(&intr->ctrl);
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intr_ctrl &= 0x00ff0000; /* Keeps IRQ[0-3] config */
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intr_ctrl |= 0x0f000000 | /* clear IRQ 0-3 */
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0x00001000 | /* MEE master external enable */
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0x00000000 | /* 0 means disable IRQ 0-3 */
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0x00000001; /* CEb route critical normally */
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out_be32(&intr->ctrl, intr_ctrl);
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/* Zero a bunch of the priority settings. */
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out_be32(&intr->per_pri1, 0);
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out_be32(&intr->per_pri2, 0);
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out_be32(&intr->per_pri3, 0);
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out_be32(&intr->main_pri1, 0);
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out_be32(&intr->main_pri2, 0);
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/* Initialize irq_desc[i].handler's with mpc52xx_ic. */
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for (i = 0; i < NR_IRQS; i++) {
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irq_desc[i].handler = &mpc52xx_ic;
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irq_desc[i].status = IRQ_LEVEL;
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}
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#define IRQn_MODE(intr_ctrl,irq) (((intr_ctrl) >> (22-(i<<1))) & 0x03)
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for (i=0 ; i<4 ; i++) {
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int mode;
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mode = IRQn_MODE(intr_ctrl,i);
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if ((mode == 0x1) || (mode == 0x2))
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irq_desc[i?MPC52xx_IRQ1+i-1:MPC52xx_IRQ0].status = 0;
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}
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}
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int
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mpc52xx_get_irq(struct pt_regs *regs)
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{
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u32 status;
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int irq = -1;
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status = in_be32(&intr->enc_status);
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if (status & 0x00000400) { /* critical */
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irq = (status >> 8) & 0x3;
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if (irq == 2) /* high priority peripheral */
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goto peripheral;
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irq += MPC52xx_CRIT_IRQ_BASE;
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}
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else if (status & 0x00200000) { /* main */
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irq = (status >> 16) & 0x1f;
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if (irq == 4) /* low priority peripheral */
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goto peripheral;
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irq += MPC52xx_MAIN_IRQ_BASE;
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}
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else if (status & 0x20000000) { /* peripheral */
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peripheral:
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irq = (status >> 24) & 0x1f;
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if (irq == 0) { /* bestcomm */
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status = in_be32(&sdma->IntPend);
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irq = ffs(status) + MPC52xx_SDMA_IRQ_BASE-1;
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}
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else
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irq += MPC52xx_PERP_IRQ_BASE;
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}
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return irq;
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}
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